MC68HC908QY4_10 Datasheet, PDF (45/168 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Input/Output Signals
3.5.2 Stop Mode
The ADC module is inactive after the execution of a STOP instruction. Any pending conversion is aborted.
ADC conversions resume when the MCU exits stop mode. Allow one conversion cycle to stabilize the
analog circuitry before using ADC data after exiting stop mode.
3.6 Input/Output Signals
The ADC module has four channels that are shared with I/O port A.
ADC voltage in (ADCVIN) is the input voltage signal from one of the four ADC channels to the ADC
module.
3.7 Input/Output Registers
These I/O registers control and monitor ADC operation:
• ADC status and control register (ADSCR)
• ADC data register (ADR)
• ADC clock register (ADICLK)
3.7.1 ADC Status and Control Register
The following paragraphs describe the function of the ADC status and control register (ADSCR). When a
conversion is in process and the ADSCR is written, the current conversion data should be discarded to
prevent an incorrect reading.
Address: $003C
Bit 7
6
5
4
3
2
1
Bit 0
Read: COCO
AIEN
ADCO
CH4
CH3
CH2
CH1
CH0
Write: R
Reset: 0
0
0
1
1
1
1
1
R
= Reserved
Figure 3-3. ADC Status and Control Register (ADSCR)
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
NOTE
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
MC68HC908QY/QT Family Data Sheet, Rev. 6
Freescale Semiconductor
45