MSC8251_11 Datasheet, PDF (48/68 Pages) Freescale Semiconductor, Inc – Single-Core Digital Signal Processor

Electrical Characteristics
2.6.5.2 RGMII AC Timing Specifications
Table 34 presents the RGMII AC timing specifications for applications requiring an on-board delayed clock.
Table 34. RGMII at 1 Gbps² with On-Board Delay³ AC Timing Specifications
Parameter/Condition
Symbol
Min
Typ
Max Unit
Data to clock output skew (at transmitter)⁴
Data to clock input skew (at receiver) ⁴
t_SKEWT
–0.5
—
0.5
ns
t_SKEWR
1
—
2.6
ns
Notes: 1. At recommended operating conditions with V_DDIO of 2.5 V ± 5%.
2. RGMII at 100 Mbps support is guaranteed by design.
3. Program GCR4 as 0x00000000.
4. This implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns and
less than 2.0 ns is added to the associated clock signal.
Table 35 presents the RGMII AC timing specification for applications required non-delayed clock on board.
Table 35. RGMII at 1 Gbps² with No On-Board Delay³ AC Timing Specifications
Parameter/Condition
Symbol
Min
Typ
Max Unit
Data to clock output skew (at transmitter)⁴
Data to clock input skew (at receiver)⁴
t_SKEWT
–2.6
—
–1.0
ns
t_SKEWR
–0.5
—
0.5
ns
Notes: 1. At recommended operating conditions with V_DDIO of 2.5 V ± 5%.
2. RGMII at 100 Mbps support is guaranteed by design.
3. GCR4 should be programmed as 0x000CC330.
4. This implies that PC board design requires clocks to be routed with no additional trace delay
Figure 25 shows the RGMII AC timing and multiplexing diagrams.
GTX_CLK
(At transmitter)
TXD[3:0]
TX_CTL
txd[3:0] txd[7:4]
t_SKEWT
RXD[3:0]
RX_CTL
RX_CLK
(At Receiver)
rxd[3:0] rxd[8:5]
Figure 25. RGMII AC Timing and Multiplexing
t_SKEWR
MSC8251 Single-Core Digital Signal Processor Data Sheet, Rev. 6
48
Freescale Semiconductor