MSC8251_11 Datasheet, PDF (46/68 Pages) Freescale Semiconductor, Inc – Single-Core Digital Signal Processor

Electrical Characteristics
Figure 21 shows the TDM transmit signal timing.
TDMxTCK
TDMxTD
TDMxRCK
TDMxTFS (output)
t_DMIVKH
TDMxTFS (input)
t_{DM_HIGH}
t_DM
t_{DM_LOW}
t_DMTKHOV
t_{DM_OUTAC}
t_DMFSKHOV
t_DMFSIXKH
t_{DM_OUTHI}
t_DMTKHOX
t_DMFSKHOX
Figure 21. TDM Transmit Signals
Figure 22 provides the AC test load for the TDM/SI.
Output
Z₀ = 50 Ω
R_L = 50 Ω
V_DDIO/2
Figure 22. TDM AC Test Load
2.6.4 Timers AC Timing Specifications
Table 32 lists the timer input AC timing specifications.
Table 32. Timers Input AC Timing Specifications
Characteristics
Symbol
Minimum
Unit
Notes
Timers inputs—minimum pulse width
T_TIWID
8
ns
1, 2
Notes: 1. The maximum allowed frequency of timer outputs is 125 MHz. Configure the timer modules appropriately.
2. Timer inputs and outputs are asynchronous to any visible clock. Timer outputs should be synchronized before use by any
external synchronous logic. Timer inputs are required to be valid for at least t_TIWID ns to ensure proper operation.
Note: For recommended operating conditions, see Table 3.
Figure 23 shows the AC test load for the timers.
Output
Z₀ = 50 Ω
R_L = 50 Ω
V_DDIO/2
Figure 23. Timer AC Test Load
MSC8251 Single-Core Digital Signal Processor Data Sheet, Rev. 6
46
Freescale Semiconductor