56F8014 Datasheet, PDF (39/124 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Peripheral Memory Mapped Registers
Table 4-18 GPIOC Registers Address Map
(GPIOC_BASE = $00 F120)
Register Acronym
Address Offset
Register Description
GPIOC_PUPEN
GPIOC_DATA
GPIOC_DDIR
GPIOC_PEREN
GPIOC_IASSRT
GPIOC_IEN
GPIOC_IEPOL
GPIOC_IPEND
GPIOC_IEDGE
GPIOC_PPOUTM
GPIOC_RDATA
GPIOC_DRIVE
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Edge Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Output Mode Control Register
$A
Raw Data Register
$B
Drive Strength Control Register
Table 4-19 GPIOD Registers Address Map
(GPIOD_BASE = $00 F130)
Register Acronym
Address Offset
Register Description
GPIOD_PUPEN
GPIOD_DATA
GPIOD_DDIR
GPIOD_PEREN
GPIOD_IASSRT
GPIOD_IEN
GPIOD_IEPOL
GPIOD_IPEND
GPIOD_IEDGE
GPIOD_PPOUTM
GPIOD_RDATA
GPIOD_DRIVE
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Edge Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Output Mode Control Register
$A
Raw Data Register
$B
Drive Strength Control Register
56F8014 Technical Data, Rev. 3
Freescale Semiconductor
39
Preliminary