56F8014 Datasheet, PDF (20/124 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Table 2-3 56F8014 Signal and Package Information for the 32-Pin LQFP (Continued)
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description
GPIOB2
18
Input/ Input, pulled Port B GPIO — This GPIO pin can be individually programmed as
Output
high an input or output pin.
internally
(MISO)
Input/
Output
SPI Master In/Slave Out — This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device
is not selected. The slave device places data on the MISO line a
half-cycle before the clock edge the master device uses to latch the
data.
(T2⁵)
Input/
Output
T2 — Timer, Channel 2
After reset, the default state is GPIOB2. The peripheral functionality
is controlled via the SIM. See Section 6.3.8.
5. This signal is also brought out on the GPIOA4 pin.
GPIOB3
17
Input/ Input, pulled Port B GPIO — This GPIO pin can be individually programmed as
Output
high an input or output pin.
internally
(MOSI)
Input/
Output
SPI Master Out/Slave In— This serial data pin is an output from a
master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge the
slave device uses to latch the data.
(T3⁶)
Input/
Output
T3 — Timer, Channel 3
After reset, the default state is GPIOB3. The peripheral functionality
is controlled via the SIM. See Section 6.3.8.
6. This signal is also brought out on the GPIOA5 pin.
GPIOA0
28
Input/ Input, pulled Port A GPIO — This GPIO pin can be individually programmed as
Output
high an input or output pin.
internally
(PWM0)
Output
PWM0 — This is one of the six PWM output pins.
After reset, the default state is GPIOA0.
Return to Table 2-2
56F8014 Technical Data, Rev. 3
20
Freescale Semiconductor
Preliminary