56F8014 Datasheet, PDF (3/124 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

56F8014 General Description
• Up to 32 MIPS at 32MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• 16KB Program Flash
• 4KB Unified Data/Program RAM
• One 5-channel PWM module
• Two 4-channel 12-bit ADCs
• One Serial Communication Interface (SCI) with LIN
slave functionality
• One Serial Peripheral Interface (SPI)
• One 16-bit Quad Timer
• One Inter-Integrated Circuit (I²C) Port
• Computer Operating Properly (COP)/Watchdog
• On-Chip Relaxation Oscillator
• Integrated Power-On Reset and Low-Voltage Interrupt
Module
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 26 GPIO lines
• 32-pin LQFP Package
5 _{PWM Outputs}
4
AD0 _ADC
or
GPIOC
4
AD1
RESET
4
V_CAP
V_DD
V_{SS_IO} V_DDA
2
V_SSA
PWM
or Timer Port
or GPIOA
JTAG/EOnCE
Port or
GPIOD
Digital Reg Analog Reg
16-Bit
56800E Core
Low-Voltage
Supervisor
Program Controller
and Hardware
Looping Unit
Address
Generation Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Bit
Manipulation
Unit
PAB
PDB
CDBR
CDBW
Memory
Program Memory
8K x 16 Flash
Unified Data /
Program RAM
4KB
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
R/W Control
System Bus
Control
2
Timer or
GPIOB
IPBus Bridge (IPBB)
SPI or I²C
or Timer
or GPIOB
4
SCI
or I²C
or GPIOB
2
COP/
Watchdog
Interrupt
Controller
System P
Integration ^O
Module
R
Clock
Generator*
O
S
C
*Includes On-Chip
Relaxation Oscillator
56F8014 Block Diagram
56F8014 Technical Data, Rev. 3
Freescale Semiconductor
3
Preliminary