English
Language : 

K22P48M50SF4 Datasheet, PDF (37/55 Pages) Freescale Semiconductor, Inc – K22 Sub-Family Data Sheet
Peripheral operating requirements and behaviors
2. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
3. The ADC supply current depends on the ADC conversion clock speed, conversion rate and the ADLPC bit (low power).
For lowest power operation the ADLPC bit must be set, the HSC bit must be clear with 1 MHz ADC conversion clock
speed.
4. 1 LSB = (VREFH - VREFL)/2N
5. ADC conversion clock < 16 MHz, Max hardware averaging (AVGE = %1, AVGS = %11)
6. Input data is 100 Hz sine wave. ADC conversion clock < 12 MHz.
7. Input data is 1 kHz sine wave. ADC conversion clock < 12 MHz.
Figure 10. Typical ENOB vs. ADC_CLK for 16-bit differential mode
K22 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
Freescale Semiconductor, Inc.
37