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K22P48M50SF4 Datasheet, PDF (34/55 Pages) Freescale Semiconductor, Inc – K22 Sub-Family Data Sheet | |||
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Peripheral operating requirements and behaviors
6.6.1 ADC electrical specifications
The 16-bit accuracy specifications listed in Table 24 and Table 25 are achievable on the
differential pins ADCx_DP0, ADCx_DM0.
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 24. 16-bit ADC operating conditions
Symbol
VDDA
ÎVDDA
ÎVSSA
VREFH
VREFL
VADIN
CADIN
Description
Conditions
Supply voltage Absolute
Supply voltage
Ground voltage
ADC reference
voltage high
Delta to VDD (VDD-VDDA)
Delta to VSS (VSS - VSSA)
ADC reference
voltage low
Input voltage
Input capacitance ⢠16-bit mode
⢠8-/10-/12-bit modes
Min.
1.71
-100
-100
1.13
VSSA
VREFL
â
â
Typ.1
â
0
0
VDDA
VSSA
â
8
4
Max.
3.6
+100
+100
VDDA
VSSA
VREFH
10
5
Unit
V
mV
mV
V
V
V
pF
Notes
2
2
RADIN
RAS
Input resistance
Analog source
resistance
13-/12-bit modes
fADCK < 4 MHz
â
2
5
kΩ
3
â
â
5
kΩ
fADCK
ADC conversion ⤠13-bit mode
clock frequency
1.0
â
18.0
MHz
4
fADCK
ADC conversion 16-bit mode
clock frequency
2.0
â
12.0
MHz
4
Crate ADC conversion ⤠13 bit modes
5
rate
No ADC hardware averaging 20.000
â
818.330
Ksps
Continuous conversions
enabled, subsequent
conversion time
Crate ADC conversion 16-bit mode
5
rate
No ADC hardware averaging 37.037
â
461.467
Ksps
Continuous conversions
enabled, subsequent
conversion time
1. Typical values assume VDDA = 3.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. DC potential difference.
K22 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
34
Freescale Semiconductor, Inc.
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