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K22P48M50SF4 Datasheet, PDF (21/55 Pages) Freescale Semiconductor, Inc – K22 Sub-Family Data Sheet
Board type
—
Symbol
ΨJT
Peripheral operating requirements and behaviors
Description
48 LQFP
Thermal
characterization
parameter, junction
to package top
outside center
(natural
convection)
Unit
°C/W
Notes
6
1.
Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site
(board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board
thermal resistance.
2.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air) with the single layer board horizontal. For the LQFP, the board meets the
JESD51-3 specification. For the MAPBGA, the board meets the JESD51-9 specification.
3.
Determined according to JEDEC Standard JESD51-6, Integrated Circuits Thermal Test Method Environmental
Conditions—Forced Convection (Moving Air) with the board horizontal.
4.
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board. Board temperature is measured on the top surface of the board near the package.
5.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
6.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
6 Peripheral operating requirements and behaviors
6.1 Core modules
6.1.1 JTAG electricals
Table 12. JTAG limited voltage range electricals
Symbol
J1
Description
Operating voltage
TCLK frequency of operation
• Boundary Scan
• JTAG and CJTAG
• Serial Wire Debug
Min.
2.7
0
0
0
Max.
3.6
10
25
50
J2
TCLK cycle period
J3
TCLK clock pulse width
• Boundary Scan
• JTAG and CJTAG
• Serial Wire Debug
1/J1
—
50
—
20
—
10
—
J4
TCLK rise and fall times
—
3
Table continues on the next page...
K22 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
Freescale Semiconductor, Inc.
Unit
V
MHz
ns
ns
ns
ns
ns
21