K22P48M50SF4 Datasheet, PDF (35/55 Pages) Freescale Semiconductor, Inc – K22 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
3. This resistance is external to MCU. The analog source resistance must be kept as low as possible to achieve the best
results. The results in this data sheet were derived from a system which has < 8 Ω analog source resistance. The R_AS/C_AS
time constant should be kept to < 1ns.
4. To use the maximum ADC conversion clock frequency, the ADHSC bit must be set and the ADLPC bit must be clear.
5. For guidelines and examples of conversion rate calculation, download the ADC calculator tool: http://cache.freescale.com/
files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp=1
Z_AS
R_AS
SIMPLIFIED
INPUT PIN EQUIVALENT
CIRCUIT
Pad
leakage
due to
input
protection
Z_ADIN
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
R_ADIN
ADC SAR
ENGINE
V_ADIN
V_AS
C_AS
INPUT PIN
INPUT PIN
INPUT PIN
R_ADIN
R_ADIN
R_ADIN
C_ADIN
Figure 9. ADC input impedance equivalency diagram
6.6.1.2 16-bit ADC electrical characteristics
Table 25. 16-bit ADC characteristics (V_REFH = V_DDA, V_REFL = V_SSA)
Symbol Description
Conditions¹
Min.
Typ.²
Max.
Unit
I_{DDA_ADC} Supply current
0.215
—
ADC
• ADLPC = 1, ADHSC = 0 1.2
2.4
f_ADACK
asynchronous
clock source
• ADLPC = 1, ADHSC = 1 2.4
• ADLPC = 0, ADHSC = 0 3.0
4.0
5.2
• ADLPC = 0, ADHSC = 1 4.4
6.2
1.7
mA
3.9
MHz
6.1
MHz
7.3
MHz
9.5
MHz
TUE
Sample Time
Total unadjusted
error
See Reference Manual chapter for sample times
• 12-bit modes
—
±4
• <12-bit modes
—
±1.4
±6.8
±2.1
LSB⁴
DNL
Differential non-
linearity
• 12-bit modes
• <12-bit modes
—
±0.7 -1.1 to +1.9 LSB⁴
-0.3 to 0.5
—
±0.2
Table continues on the next page...
Notes
3
t_ADACK = 1/
f_ADACK
5
5
K22 Sub-Family Data Sheet Data Sheet, Rev. 3, 08/2012.
Freescale Semiconductor, Inc.
35