MC9S12XEP100 Datasheet, PDF (368/1036 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 10 XGATE (S12XGATEV3)
Read: Anytime
Write: Anytime
Table 10-9. XGIV Field Descriptions
Field
Description
127–9
XGIF[78:9]
Channel Interrupt Flags — These bits signal pending channel interrupts. They can only be set by the RISC
core (see SIF instruction on page 10-455). Each flag can be cleared by writing a "1" to its bit location.
Unimplemented interrupt flags will always read "0". Section “Interrupts” of the SoC Guide for a list of
implemented Interrupts.
Read:
0 Channel interrupt is not pending
1 Channel interrupt is pending if XGIE is set
Write:
0 No effect
1 Clears the interrupt flag
NOTE
Suggested Mnemonics for accessing the interrupt flag vector on a word
basis are:
XGIF_7F_70 (XGIF[127:112]),
XGIF_6F_60 (XGIF[111:96]),
XGIF_5F_50 (XGIF[95:80]),
XGIF_4F_40 (XGIF[79:64]),
XGIF_3F_30 (XGIF[63:48]),
XGIF_2F_20 (XGIF[47:32]),
XGIF_1F_10 (XGIF[31:16]),
XGIF_0F_00 (XGIF[15:0])
MC9S12XE-Family Reference Manual , Rev. 1.07
368
Freescale Semiconductor