S9S08SG8E2MSC Datasheet, PDF (35/320 Pages) Freescale Semiconductor, Inc – MC9S08SG8 MC9S08SG4 Data Sheet Addendum

Chapter 2 Pins and Connections
Table 2-1. Pin Availability by Package Pin-Count
Pin Number
Lowest
Priority
Highest
20-pin 16-pin 8-pin Port Pin
Alt 1
Alt 2
Alt 3
Alt 4
Alt5
1
1
1
RESET
2
2
2
BKGD
MS
3
3
4
4
5
5
6
6
7
7
8
8
9
—
10
—
11
—
12
—
13
9
14
10
3
4
— PTB7
— PTB6
— PTB5
— PTB4
— PTC3
— PTC2
— PTC1
— PTC0
— PTB3
— PTB2
V_DD
V_SS
SCL¹
EXTAL
SDA¹
XTAL
TPM1CH1² SS
PTC0³
TPM2CH1 MISO
PTC0³
PTC0³
ADP11
PTC0³
ADP10
TPM1CH1² PTC0³
ADP9
TPM1CH0² PTC0³
ADP8
PIB3
MOSI
PTC0³
ADP7
PIB2
SPSCK
PTC0³
ADP6
15
11
— PTB1
PIB1
TxD
ADP5
16
12
17
13
18
14
19
15
20
16
— PTB0
5 PTA3
6 PTA2
7 PTA1
8 PTA0
PIB0
PIA3
PIA2
PIA1
PIA0
RxD
SCL¹
SDA¹
TPM2CH0
TPM1CH0²
TCLK
ADP4
ADP3
ADP2
ADP1⁴
ADP0⁴
ACMPO
ACMP–⁴
ACMP+⁴
1 _{IIC pins can be repositioned using IICPS in SOPT2, default reset locations are on PTA2 and PTA3.}
2 _{TPM1CHx pins can be repositioned using TPM1PS in SOPT2, default reset locations are on PTA0 and}
PTB5.
3 _{This port pin is part of the ganged output feature. When pin is enabled for ganged output, it will have priority}
over all digital modules. The output data, drive strength and slew-rate control of this port pin will follow the
configuration for the PTC0 pin, even in 16-pin packages where PTC0 doesn’t bond out. Ganged output not
available in 8-pin packages.
4 _{If ACMP and ADC are both enabled, both will have access to the pin.}
MC9S08SG8 MCU Series Data Sheet, Rev. 7
Freescale Semiconductor
31