S9S08SG8E2MSC Datasheet, PDF (16/320 Pages) Freescale Semiconductor, Inc – MC9S08SG8 MC9S08SG4 Data Sheet Addendum

Section Number
Title
Page
4.5.3 Program and Erase Command Execution .........................................................................50
4.5.4 Burst Program Execution ..................................................................................................51
4.5.5 Access Errors ....................................................................................................................53
4.5.6 FLASH Block Protection ..................................................................................................53
4.5.7 Vector Redirection ............................................................................................................54
4.6 Security ............................................................................................................................................54
4.7 FLASH Registers and Control Bits .................................................................................................55
4.7.1 FLASH Clock Divider Register (FCDIV) ........................................................................56
4.7.2 FLASH Options Register (FOPT and NVOPT) ................................................................57
4.7.3 FLASH Configuration Register (FCNFG) .......................................................................58
4.7.4 FLASH Protection Register (FPROT and NVPROT) ......................................................58
4.7.5 FLASH Status Register (FSTAT) ......................................................................................59
4.7.6 FLASH Command Register (FCMD) ...............................................................................60
Chapter 5
Resets, Interrupts, and General System Control
5.1 Introduction .....................................................................................................................................61
5.2 Features ...........................................................................................................................................61
5.3 MCU Reset ......................................................................................................................................61
5.4 Computer Operating Properly (COP) Watchdog .............................................................................62
5.5 Interrupts .........................................................................................................................................63
5.5.1 Interrupt Stack Frame .......................................................................................................64
5.5.2 Interrupt Vectors, Sources, and Local Masks ...................................................................65
5.6 Low-Voltage Detect (LVD) System ................................................................................................67
5.6.1 Power-On Reset Operation ...............................................................................................67
5.6.2 Low-Voltage Detection (LVD) Reset Operation ...............................................................67
5.6.3 Low-Voltage Warning (LVW) Interrupt Operation ...........................................................67
5.7 Reset, Interrupt, and System Control Registers and Control Bits ...................................................67
5.7.1 System Reset Status Register (SRS) .................................................................................68
5.7.2 System Background Debug Force Reset Register (SBDFR) ............................................69
5.7.3 System Options Register 1 (SOPT1) ................................................................................70
5.7.4 System Options Register 2 (SOPT2) ................................................................................71
5.7.5 System Device Identification Register (SDIDH, SDIDL) ................................................72
5.7.6 System Power Management Status and Control 1 Register (SPMSC1) ...........................73
5.7.7 System Power Management Status and Control 2 Register (SPMSC2) ...........................74
Chapter 6
Parallel Input/Output Control
6.1 Port Data and Data Direction ..........................................................................................................75
6.2 Pull-up, Slew Rate, and Drive Strength ..........................................................................................76
6.3 Ganged Output ................................................................................................................................77
6.4 Pin Interrupts ...................................................................................................................................78
MC9S08SG8 MCU Series Data Sheet, Rev. 7
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Freescale Semiconductor