English
Language : 

K10P144M120SF3 Datasheet, PDF (32/75 Pages) Freescale Semiconductor, Inc – K10 Sub-Family Data Sheet
Peripheral operating requirements and behaviors
Table 20. Flash command timing specifications (continued)
Symbol Description
Swap Control execution time
tswapx01
tswapx02
tswapx04
tswapx08
• control code 0x01
• control code 0x02
• control code 0x04
• control code 0x08
tpgmpart Program Partition for EEPROM execution time
Set FlexRAM Function execution time:
tsetram64k
tsetram128k
tsetram256k
tsetram512k
• 64 KB EEPROM backup
• 128 KB EEPROM backup
• 256 KB EEPROM backup
• 512 KB EEPROM backup
teewr8bers Byte-write to erased FlexRAM location execution
time
Byte-write to FlexRAM execution time:
teewr8b64k
teewr8b128k
teewr8b256k
teewr8b512k
• 64 KB EEPROM backup
• 128 KB EEPROM backup
• 256 KB EEPROM backup
• 512 KB EEPROM backup
teewr16bers 16-bit write to erased FlexRAM location
execution time
16-bit write to FlexRAM execution time:
teewr16b64k
teewr16b128k
teewr16b256k
teewr16b512k
• 64 KB EEPROM backup
• 128 KB EEPROM backup
• 256 KB EEPROM backup
• 512 KB EEPROM backup
teewr32bers 32-bit write to erased FlexRAM location
execution time
teewr32b64k 32-bit-write to FlexRAM execution time:
teewr32b128k
• 64 KB EEPROM backup
teewr32b256k
teewr32b512k
• 128 KB EEPROM backup
• 256 KB EEPROM backup
• 512 KB EEPROM backup
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ.
185
65
65
25
TBD
TBD
TBD
TBD
TBD
100
TBD
TBD
TBD
TBD
100
TBD
TBD
TBD
TBD
200
TBD
TBD
TBD
TBD
Max.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Unit
μs
μs
μs
μs
ms
ms
ms
ms
ms
μs
ms
ms
ms
ms
μs
ms
ms
ms
ms
μs
ms
ms
ms
ms
1. Assumes 25MHz flash clock frequency.
2. Maximum times for erase parameters based on expectations at cycling end-of-life.
3. For byte-writes to an erased FlexRAM location, the aligned word containing the byte must be erased.
Notes
3
K10 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
32
Preliminary
Freescale Semiconductor, Inc.