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S9S12C128F0MFUE Datasheet, PDF (319/690 Pages) Freescale Semiconductor, Inc – Reference Manual | |||
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Chapter 10 Freescaleâs Scalable Controller Area Network (S12MSCANV2)
Module Base + 0x00X1
7
6
5
4
3
2
1
0
R
ID2
ID1
ID0
RTR
IDE (=0)
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 10-30. Identiï¬er Register 1 â Standard Mapping
Field
7:5
ID[2:0]
4
RTR
3
IDE
Table 10-29. IDR1 Register Field Descriptions
Description
Standard Format Identiï¬er â The identiï¬ers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most signiï¬cant bit and is transmitted ï¬rst on the CAN bus during the arbitration procedure. The priority of an
identiï¬er is deï¬ned to be highest for the smallest binary number. See also ID bits in Table 10-28.
Remote Transmission Request â This ï¬ag reï¬ects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this ï¬ag deï¬nes the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended â This ï¬ag indicates whether the extended or standard identiï¬er format is applied in this buffer. In
the case of a receive buffer, the ï¬ag is set as received and indicates to the CPU how to process the buffer
identiï¬er registers. In the case of a transmit buffer, the ï¬ag indicates to the MSCAN what type of identiï¬er to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Module Base + 0x00X2
7
6
5
4
3
2
1
0
R
W
Reset:
x
x
x
x
x
x
x
x
= Unused; always read âxâ
Figure 10-31. Identiï¬er Register 2 â Standard Mapping
Freescale Semiconductor
MC9S12C-Family / MC9S12GC-Family
319
Rev 01.24
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