MC9S08JM60 Datasheet, PDF (310/386 Pages) Freescale Semiconductor, Inc – Microcontrollers

Universal Serial Bus Device Controller (S08USBV1)
internal basic virtual component interface (BVCI) compliant target and initiator buses. The BVCI target
interface is used to configure the USB SIE and to provide status and interrupts to CPU. The BVCI initiator
interface provides the integrated DMA controller access to the buffer descriptor table (BDT), and transfers
USB data to or from USB RAM memory.
17.4.1.1.1 Serial Interface Engine (SIE) Transmitter Logic
The SIE transmitter logic has two primary functions. The first is to format the USB data packets that have
been stored in the endpoint buffers. The second is to transmit data packets via the USB transceiver.
All of the necessary USB data formatting is performed by the SIE transmitter logic, including:
• NRZI encoding
• bit-stuffing
• CRC computation
• addition of the SYNC field
• addition of the End-of-packet (EOP)
The CPU typically places data in the endpoint buffers as part of the application. When the buffer is
configured as an IN buffer and the USB host requests a packet, the SIE responds with a properly formatted
data packet.
The transmitter logic is also used to generate responses to packets received from the USB host. When a
properly formatted packet is received from the USB host, the transmitter logic responds with the
appropriate ACK, NAK or STALL handshake.
When the SIE transmitter logic is transmitting data from the buffer space for a particular endpoint, CPU
access to that endpoint buffer space is not recommended.
17.4.1.1.2 Serial Interface Engine (SIE) Receiver Logic
The SIE receiver logic receives USB data and stores USB packets in USB RAM for processing by the CPU
and the application software. Serial data from the transceiver is converted to a byte-wide parallel data
stream, checked for proper packet framing, and stored in the USB RAM memory.
Received bitstream processing includes the following operations:
• decodes an NRZI USB serial data stream
• Sync detection
• Bit-stuff removal (and error detection)
• End-of-packet (EOP) detection
• CRC validation
• PID check
• other USB protocol layer checks.
The SIE receiver logic provides error detection including:
• Bad CRC
• Timeout detection for EOP
MC9S08JM60 Series Data Sheet, Rev. 2
310
Freescale Semiconductor