MC9S08QA4_09 Datasheet, PDF (3/32 Pages) Freescale Semiconductor, Inc – Technical Data

MCU Block Diagram
1 MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9S08QA4 MCU.
HCS08 CORE
CPU
BDC
HCS08 SYSTEM CONTROL
DEBUG MODULE (DBG)
8-BIT MODULO TIMER
MODULE (MTIM)
BKGD/MS
IRQ
TCLK
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RTI
COP
IRQ
LVD
USER FLASH
(MC9S08QA4 = 4096 BYTES)
(MC9S08QA2 = 2048 BYTES)
USER RAM
(MC9S08QA4 = 256 BYTES)
(MC9S08QA2 = 160BYTES)
16 MHz INTERNAL CLOCK
SOURCE (ICS)
8-BIT KEYBOARD
INTERRUPT MODULE (KBI)
ANALOG COMPARATOR
(ACMP)
10-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
16-BIT TIMER/PWM
MODULE (TPM)
4
ACMPO
ACMP–
ACMP+
4
TPMCH0
PTA5//IRQ/TCLK/RESET
PTA4/ACMPO/BKGD/MS
PTA3/KBIP3/ADP3
PTA2/KBIP2/ADP2
PTA1/KBIP1/ADP1/ACMP–
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
V_SS
V_DD
VOLTAGE REGULATOR
V_DDA
V_SSA
V_REFH
V_REFL
NOTES:
1 _{Port pins are software configurable with pullup device if input port.}
2 _{Port pins are software configurable for output drive strength.}
3 _{Port pins are software configurable for output slew rate control.}
4 _{IRQ contains a software configurable (IRQPDD) pullup device if PTA5 enabled as IRQ pin function (IRQPE = 1).}
5 _{RESET contains integrated pullup device if PTA5 enabled as reset pin function (RSTPE = 1).}
6 _{PTA4 contains integrated pullup device if BKGD enabled (BKGDPE = 1).}
7 _{When pin functions as KBI (KBIPEn = 1) and associated pin is configured to enable the pullup device, KBEDGn can}
be used to reconfigure the pullup as a pulldown device.
Figure 1. MC9S08QA4 Series Block Diagram
2 Pin Assignments
This section shows the pin assignments in the packages available for the MC9S08QA4 series.
MC9S08QA4 Series MCU Data Sheet, Rev. 3
Freescale Semiconductor
3