33902 Datasheet, PDF (3/31 Pages) Freescale Semiconductor, Inc – High Speed CAN Interface with Embedded 5.0 V Supply

PIN CONNECTIONS
PIN CONNECTIONS
PIN CONFIGURATION
TXD
1
GND
2
14
STBY
13
CANH
VDD
3
RXD
4
VIO
5
EN
6
INH
7
12
CANL
11
SPLIT
10
VSUP
9
WAKE
8
ERR
Table 1. 33902 Pin Definitions
Figure 3. 33902 Pin Connections
Pin Number Pin Name Pin Function Formal Name
Definition
1
TXD
Input
Transmit data
CAN bus transmit data input pin
2
GND
Output
Ground
Ground termination
3
VDD
Output ^{Voltage Digital Drain CAN dedicated internal voltage regulator, (decoupling capacitor required}
for voltage stabilization)
4
RXD
Output
Receive data
CAN bus receive data output pin, wake-up flag in Low Power mode
5
VIO
Input
Voltage supply for I/O Input supply for the digital input output pins
6
EN
Input
Enable
Enable input for device static mode control.
MOSI (Master Out, Slave In) during P_SPI operation.
7
INH
Output
Inhibit
Inhibit output for control of an external power supply regulator
8
ERR
Output
Active low Error Pin for static error and wake-up flag reporting
MISO (Master In, Slave Out) during P_SPI operation.
9
WAKE
Input
Wake
Wake input
10
VSUP
Input
Voltage supply
Battery supply pin
11
SPLIT
Output
Split
Output for connection of the CAN bus termination middle point
12
CANL
Input/output
CAN LOW
CAN low pin
13
CANH Input/output
CAN HIGH
CAN high pin
14
STBY
Input
Standby
Standby input for device static mode control.
CLK (Clock) during P_SPI operation.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33902
3