33902 Datasheet, PDF (19/31 Pages) Freescale Semiconductor, Inc – High Speed CAN Interface with Embedded 5.0 V Supply

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
CAN BUS DIAGNOSTIC
The aim is to implement a diagnostic of bus short-circuit to
GND, VBAT, and the internal application circuit board 5.0 V.
Several comparators are implemented on the CANH and
CANL lines. These comparators monitor the bus level in the
recessive and dominant states. The information is then
managed by the logic circuitry to properly determine the
failure and report it.
H5 ^VR5
TX
Diag
Logic
Hb ^{VRVB V}DD
Hg ^VRG
CANH
Lg _VRG
Lb _VRVB
L5 _VR5
CANL
V_BAT (12-14 V)
V_RVB (V_SUP-2.0 V)
V_DD (5.0 V)
V_R5 (V_DD-.43 V)
CANH dominant level (3.6 V)
Recessive level (2.5 V)
V_RG (1.75 V)
CANL dominant level (1.4 V)
GND (0.0 V)
Figure 14. CAN Bus Simplified Structure Truth Table for Failure Detection
Table 7 indicates the state of the comparators in case of a bus failure, and depending upon the driver state.
Table 7. Failure Detection Truth Table
Failure description
Driver recessive state
Lg (threshold 1.75 V)
Hg (threshold 1.75 V)
No failure
CANL to GND
CANH to GND
No failure
CANL to VBAT
CANH to VBAT
No failure
CANL to 5.0 V
CANH to 5.0 V
1
0
0
Lb (threshold V_SUP-2.0 V)
0
1
1
L5 (threshold V_DD-0.43 V)
0
1
1
1
0
0
Hb (threshold V_SUP-2.0 V)
0
1
1
H5 (threshold V_DD-0.43 V)
0
1
1
Driver dominant state
Lg (threshold 1.75 V)
Hg (threshold 1.75 V)
0
1
0
1
0
0
Lb (threshold V_SUP-2.0 V)
0
1
0
Hb (threshold V_SUP-2.0 V)
0
1
1
L5 (threshold V_DD-0.43 V)
0
1
0
H5 (threshold V_DD-0.43 V)
0
1
1
Detection Principle
In the recessive state, if one of the two bus lines are
shorted to GND, VDD, or VBAT, the voltage at the other line
follows the shorted line, due to the bus termination
resistance. For example: if CANL is shorted to GND, the
CANL voltage is zero, the CANH voltage measured by the Hg
comparator is also close to zero.
In the recessive state, the failure detection to GND or
VBAT is possible. However, it is not possible with the above
implementation to distinguish which of the CANL or CANH
lines are shorted to GND or VBAT. A complete diagnostic is
possible once the driver is turned on, and in the dominant
state.
Number of Samples for Proper Failure Detection
The failure detector requires at least one cycle of the
recessive and dominant states to properly recognize the bus
failure. The error will be fully detected after 5 cycles of the
recessive-dominant states. As long as the failure detection
circuitry has not detected the same error for 5 recessive-
dominant cycles, the error is not reported.
Bus clamping detection
If the bus is detected to be in dominant for a time longer
than (t_DOM), the bus failure flag is set and the ERR is set low
in Normal mode.
Such conditions could occur if the CANH line is shorted to
a high voltage. In this case, current will flow from the high
voltage short-circuit through the bus termination resistors
(60 Ω) and then in the Split terminal (if used), and through the
device CANH and CANL input resistors, which are terminated
to an internal 2.5 V biasing or to GND (Sleep mode).
Depending upon the high voltage short-circuit, the number
of nodes, usage of split terminal, R_IN actual resistor, and
node state (sleep or active), the voltage developed across the
bus termination can be sufficient to create a positive
dominant voltage between CANH and CANL. The RXD pin
will be low. This would prevent the start of any CAN
Analog Integrated Circuit Device Data
Freescale Semiconductor
33902
19