33902 Datasheet, PDF (21/31 Pages) Freescale Semiconductor, Inc – High Speed CAN Interface with Embedded 5.0 V Supply

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Important Information for Bus Driver Reactivation RXD
The driver stays disabled until the failure is cleared (RX is
no longer permanent recessive). One transition on the CAN
bus (internal differential receiver transition), and the bus
driver is activated by entering into Normal mode.
TXD PERMANENT DOMINANT
Principle
If the TXD is set to a permanent low level, the CAN bus is
set into dominant level, and no communication is possible.
The 33902 has a TXD permanent time out detector. After the
timeout, the bus driver is disabled and the bus is released into
a recessive state. The TXD permanent flag is set.
Recovery
The TXD permanent dominant is used and activated in
case of a TXD short to RXD. The recovery condition for a
TXD permanent dominant (recovery means the re-activation
of the CAN drivers) is done by entering into a Normal mode
controlled by the MCU, or when TXD is recessive, while RXD
changes from recessive to dominant.
TXD TO RXD SHORT CIRCUIT:
Principle
If TXD is shorted to RXD during incoming dominant
information, RXD is set low. Consequently, the TXD pin is low
and drives CANH and CANL into a dominant state. Thus the
bus is stuck in dominant state. No further communication is
possible.
Detection and Recovery
The TXD permanent dominant time out will be activated
and release the CANL and CANH drivers. However, at the
next incoming dominant bit, the bus will then be stuck in
dominant again. The recovery condition is same as the TXD
dominant failure.
EXTENDED DEVICE OPERATION
The device has extended functionality which allows device
control and diagnostic readings via the P_SPI (Pseudo Serial
Peripheral Interface), and using the STBY, EN and ERR pins.
P_SPI Operation
The P_SPI operation is similar to a standard SPI interface
operation in slave mode. It uses the EN, STBY and ERR pins,
which have the functions of MOSI, SCLK and MISO. There is
no chip select (CS).
In write mode, the following functions and control are
accessible:
- CAN driver slew rate selection
- ERR pin operation mode
- CAN wake-up mode
- CRANK mode operation
Analog Integrated Circuit Device Data
Freescale Semiconductor
In read mode, the following flags are available:
- CAN bus detail diagnostic
- Local failure diagnostic
- Voltage monitoring
- Wake-up flags, wake pin level
- P_SPI errors
- Device identification
P_SPI Diagram
Figure 17 illustrates the P_SPI operation. A clock signal
should be generated on the STBY pin, EN input operates as
Data In (MOSI) and the ERR output pin operates as Data Out
(MISO).
In order to start a P_SPI operation, the level at STBY
should be low (1), as shown in Figure 17. Bit D7 starts at the
rising edge of STBY. Bit D7 level should be opposite to the
level before. D7 is then internally sampled at the STBY falling
edge.
The sampling of opposite level at (1) and (3) is the
confirmation of a P_SPI message start.
Then the P_SPI bit D6 starts, and the device will drive the
ERR pin to a level opposite to the one when P_SPI started
(5): this is the confirmation that the device has correctly
detected a P_SPI message start (acknowledgement).
D7
D6
(2)
(4)
STBY ₍₁₎
(3)
EN
EN
Adr
EN
EN
Adr
Device in Normal mode
EN=1
Device in Listen Only
EN=0
P_SPI msg start
ERR
ERR
ERR
(5)
ERR
ERR pin high at
P_SPI start
ERR pin low at
P_SPI start
P_SPI msg detected (=acknowledge)
Figure 17. : P_SPI Message Start
Full P_SPI Message:
Figure 4 describes the complete P_SPI message and
timing.
33902
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