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33902 Datasheet, PDF (28/31 Pages) Freescale Semiconductor, Inc – High Speed CAN Interface with Embedded 5.0 V Supply
COMPARISON WITH COMPETITION 14 PIN HIGH SPEED CAN TRANS-
CEIVER
COMPARISON WITH COMPETITION 14 PIN HIGH SPEED CAN TRANSCEIVER
The table below is a comparison between the MC33902 and the competition 14 pin high speed CAN transceiver having no
embedded power supply.
Item
MC33902
Competition w/o Embedded Regulator
VDD pin
Output. Requires local decoupling capacitor(s). No extra Input. Requires connection to a 5.0 V supply.
load should be connected.
Wake pin
ERR pin
Fixed threshold typ 3.0 V with hysteresis. No pull-up or Threshold VBAT -3.0 V. Active pull-up when input is above
pull-down. High-impedance input. Connect to GND when threshold. Active pull-down when input is below threshold.
not used.
Active low, reports flags, or used as MISO during P_SPI Active low, reports flags, weak driver, requiring 8.0 μs
communication. Strong driver (capability typ. 3.0 mA). stabilization time
EN and STBY pins Input used for static mode control. Used as CLOCK and Input used for mode control.
MOSI during P_SPI communication.
Bus dom failure
flag
Failure reported on ERR pin in Normal mode
Failure reported on the ERR pin in Listen Only mode
(considered as a bus failure => reported in Normal mode) (considered as a local failure)
VDD low flag
No effect on device mode. Failure on CAN transceiver
supply should not affect the complete ECU. VDD is
disabled “locally” to reduce current consumption. The
ERR pin is set low in Normal and Listen Only mode. VDD
low threshold set at 4.25 V
Set the device into Sleep mode. INH is turned OFF. If the ECU
regulator is controlled by INH, ECU is turned OFF.
VIO low flag
Wake-up time
Transition time
Same
Same
From Sleep or Standby mode, device needs 35 μs typ. to No need for a delay for device ready.
be ready.
At least 8.0 μs, to differentiate between a static transition
and P_SPI communication
Immediate transition. However, the ERR pin has weak driver
and an 8.0 μs stabilization time is required. When the device
is switched between Normal and Listen Only mode to check
the fail flag, a delay of 8.0 μs is needed.
33902
28
Analog Integrated Circuit Device Data
Freescale Semiconductor