MC9S08QE8 Datasheet, PDF (26/46 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit

Electrical Characteristics
Table 16. 12-bit ADC Characteristics (V_REFH = V_DDAD, V_REFL = V_SSAD) (continued)
C Characteristic
Conditions
Symbol Min. Typical¹ Max. Unit
Comment
P
Conversion
Short Sample
Time (Including (ADLSMP=0)
sample time)
C
Long Sample
(ADLSMP=1)
P
Sample Time
C
Short Sample
(ADLSMP=0)
Long Sample
(ADLSMP=1)
T Total
Unadjusted
P _Error
(28-pin and
T ^32-pin
packages)
12 bit mode
10 bit mode
8 bit mode
T Total
Unadjusted
P _Error
(16-pin and
T ^20-pin
package)
12 bit mode
10 bit mode
8 bit mode
T
P
Differential
Non-Linearity
T
12 bit mode
10 bit mode³
8 bit mode³
T
C
Integral
Non-Linearity
T
12 bit mode
10 bit mode
8 bit mode
T
P
Zero-Scale
Error
T
12 bit mode
10 bit mode
8 bit mode
T
P
Full-Scale
Error
T
12 bit mode
10 bit mode
8 bit mode
D
Quantization
Error
12 bit mode
10 bit mode
8 bit mode
t_ADC
t_ADS
E_TUE
E_TUE
DNL
INL
E_ZS
E_FS
E_Q
—
20
—
ADCK
See ADC
chapter in the
cycles ^{QE8 Reference}
—
40
—
Manual for
conversion time
variances
—
3.5
—
ADCK
cycles
—
23.5
—
—
±3.0
—
For 28-pin and
32-pin packages
—
±1
±2.5
LSB²
only.
—
±0.5
±1.0
Includes
quantization
—
±4.0
—
For 16-pin and
20-pin packages
—
±1.5
±3.5
LSB²
only.
—
±0.7
±1.5
Includes
quantization
—
±1.75
—
—
±0.5
±1.0 LSB²
—
—
±0.3
±0.5
—
±1.5
—
—
±0.5
±1.0 LSB²
—
—
±0.3
±0.5
—
±1.5
—
—
±0.5
±1.5
LSB²
V_ADIN = V_SSAD
—
±0.5
±0.5
—
±1.0
—
—
±0.5
±1
LSB²
V_ADIN = V_DDAD
—
±0.5
±0.5
—
–1 to 0
—
—
—
±0.5 LSB²
—
—
—
±0.5
MC9S08QE8 Series, Rev. 3
26
Preliminary
Freescale Semiconductor
Subject to Change Without Notice