English
Language : 

MC9S08QE8 Datasheet, PDF (18/46 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit
Electrical Characteristics
Table 10. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient) (continued)
Num C
Characteristic
Symbol Min. Typical1 Max. Unit
8
C
Total deviation of trimmed DCO output frequency over voltage
and temperature
9
C
Total deviation of trimmed DCO output frequency over fixed
voltage and temperature range of 0°C to 70 °C
Δfdco_t
Δfdco_t
—
+ 0.5
-1.0
± 2 %fdco
—
± 0.5
± 1 %fdco
10 C FLL acquisition time3
tAcquire
—
—
1
ms
Long term jitter of DCO output clock (averaged over 2-ms
11 C interval)4
CJitter
—
0.02
0.2 %fdco
1 Data in Typical column was characterized at 3.0 V, 25°C or is typical recommended value.
2 The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.
3 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
4 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a
given interval.
1.00%
0.50%
0.00%
-60
-40
-20
0
-0.50%
-1.00%
20
40
60
TBD
80
100
120
-1.50%
-2.00%
Temperature
Figure 13. Deviation of DCO Output from Trimmed Frequency (20 MHz, 3.0 V)
3.10 AC Characteristics
This section describes timing characteristics for each peripheral system.
MC9S08QE8 Series, Rev. 3
18
Preliminary
Freescale Semiconductor
Subject to Change Without Notice