MRF7S19100NR1 Datasheet, PDF (2/18 Pages) Freescale Semiconductor, Inc – RF Power Field Effect Transistors N-Channel Enhancement-Mode Lateral MOSFETs

Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22 - A114)
1C (Minimum)
Machine Model (per EIA/JESD22 - A115)
A (Minimum)
Charge Device Model (per JESD22 - C101)
IV (Minimum)
Table 4. Moisture Sensitivity Level
Test Methodology
Rating
Package Peak Temperature
Unit
Per JESD 22 - A113, IPC/JEDEC J - STD - 020
3
260
°C
Table 5. Electrical Characteristics (T_C = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V_DS = 65 Vdc, V_GS = 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(V_DS = 28 Vdc, V_GS = 0 Vdc)
Gate - Source Leakage Current
(V_GS = 5 Vdc, V_DS = 0 Vdc)
I_DSS
—
I_DSS
—
I_GSS
—
—
10
μAdc
—
1
μAdc
—
500
nAdc
On Characteristics
Gate Threshold Voltage
(V_DS = 10 Vdc, I_D = 320 μAdc)
Gate Quiescent Voltage ⁽¹⁾
(V_DD = 28 Vdc, I_D = 1000 mAdc, Measured in Functional Test)
Drain - Source On - Voltage
(V_GS = 10 Vdc, I_D = 3.2 Adc)
Dynamic Characteristics ⁽²⁾
Reverse Transfer Capacitance
(V_DS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, V_GS = 0 Vdc)
Output Capacitance
(V_DS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, V_GS = 0 Vdc)
V_GS(th)
1
2
3
Vdc
V_GS(Q)
2
2.8
4
Vdc
V_DS(on)
0.2
0.24
0.4
Vdc
C_rss
—
1.54
—
pF
C_oss
—
553.5
—
pF
Functional Tests (In Freescale Test Fixture, 50 ohm system) V_DD = 28 Vdc, I_DQ = 1000 mA, P_out = 29 W Avg., f1 = 1930 MHz,
f2 = 1990 MHz, Single - Carrier W - CDMA, 3GPP Test Model 1, 64 DPCH, 50% Clipping, PAR = 7.5 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
G_ps
16.5
17.5
19.5
dB
Drain Efficiency
η_D
28.5
30
—
%
Output Peak - to - Average Ratio @ 0.01% Probability on CCDF
PAR
5.7
6.1
—
dB
Adjacent Channel Power Ratio
ACPR
—
- 38
- 36
dBc
Input Return Loss
IRL
—
- 12
- 10
dB
1. V_GG = 11/10 x V_GS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit
schematic.
2. Part internally matched both on input and output.
(continued)
MRF7S19100NR1 MRF7S19100NBR1
2
RF Device Data
Freescale Semiconductor