33970 Datasheet, PDF (19/36 Pages) Freescale Semiconductor, Inc – Dual Gauge Driver Integrated Circuit with Improved Damping Algorithms

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Any bits clocked out of the SO pin after the first 16 are
representative of the initial message bits clocked into the SI
pin since the CS pin first transitioned to a logic [0]. This
feature is useful for daisy-chaining devices as well as
message verification.
As described above, the last valid write to bits PE11:PE8
of the PECCR command determines the nature of the status
data that is clocked out of the SO pin.
There are five different types of status information
available:
1. Device Status (refer to Table 15 below)
2. RTZ Accumulator Status (refer to Table 16, page 20)
3. Gauge 0 Pointer Position Status (refer to Table 17,
page 21)
4. Gauge 1 Pointer Position Status (refer to Table 18,
page 21)
5. Gauge 1 and 2 Pointer Velocity Status (refer to
Table 19, page 22)
Once a specific status type is selected, it will not change
until either the PECCR command bits PE11:PE8 (D11:D8)
are written to select another or the device is reset. Each of the
Status types and the PECCR bit necessary to select them are
described below.
Device Status Information
Most recent valid PECCR command resulting in the
Device Status output:
D11
D10
D9
D8
0
x
x
x
x = Don’t care.
Table 15. Device Status Output Register
Bits OD15 OD14 OD13 OD12 OD11 OD10 OD9 OD8 OD7 OD6 OD5 OD4 OD3 OD2
Read DIR1 DIR0 0POS1 0POS0 CMD1 CMD0 OV UV CAL OVUV MOV1 MOV0 RTZ1 RTZ0
Write –
–
–
–
–
–
–
–
–
–
–
–
–
–
OD1
OT1
–
OD0
OT0
–
The bits in Table 15 are read-only bits.
DIR1 (OD15) — This bit indicates the direction Gauge 1
pointer is moving.
• 0 = Toward position 0
• 1 = Away from position 0
DIR0 (OD14) — This bit indicates the direction Gauge 0
pointer is moving.
• 0 = Toward position 0
• 1 = Away from position 0
0POS1 (OD13) — This bit indicates the configured Position
0 for Gauge 1.
• 0 = Farthest CCW
• 1 = Farthest CW
0POS0 (OD12) — This bit indicates the configured Position
0 for Gauge 0.
• 0 = Farthest CCW
• 1 = Farthest CW
CMD1 (OD11) — This bit indicates whether Gauge 1 is at
the most recently commanded position.
• 0 = At commanded position
• 1 = Not at commanded position
CMD0 (OD10) — This bit indicates whether Gauge 0 is at
the most recently commanded position.
• 0 = At commanded position
• 1 = Not at commanded position
OV (OD9) — Overvoltage Indication. A logic [1] on this bit
indicates V_PWR voltage exceeded the upper limit of V_PWROV
since the last SPI communication (refer to the Static Electrical
Characteristics table under POWER INPUT, page 5). An
overvoltage event will automatically disable the driver
outputs. Because the pointer may not be in the expected
position, the master may want to re-calibrate the pointer
position with an RTZ command after the voltage returns to a
normal level. For an overvoltage event, both gauges must be
re-enabled as quickly as this flag returns to logic [0]. The
state machine will continue to operate properly as long as
V_DD is within the normal range.
• 0 = Normal range
• 1 = Battery voltage exceeded V_PWROV
UV (OD8) — Undervoltage Indication. A logic 1] on this bit
indicates the V_PWR voltage fell below V_PWRUV since the last
SPI communication (refer to the Static Electrical
Characteristics table under POWER INPUT, page 5). An
undervoltage event is just flagged; however, at some voltage
level below 4.0 V, the outputs turn OFF and the state
machine resets. Because the pointer may not be in the
expected position, the master may want to re-calibrate the
pointer position with an RTZ command after the voltage
returns to a normal level. For an undervoltage event, both
gauges may need to be re-enabled as quickly as this flag
returns to logic [0]. The state machine will continue to operate
properly as long as V_DD is within the normal range.
• 0 = Normal range
• 1 = Battery voltage fell below V_PWRUV
CAL (OD7) — Calibrated Clock out of Specification. A
logic [1] on this bit indicates the clock count calibrated to a
value outside the expected range given the tolerance
specified by t_CLC in the Dynamic Electrical Characteristics
Analog Integrated Circuit Device Data
Freescale Semiconductor
33970
19