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MC9S12H256 Datasheet, PDF (17/130 Pages) Motorola, Inc – Device User Guide
Freescale SemiconduMcCt9oS1r2,HI2n56cD.evice User Guide — V01.18
Section 1 Introduction
1.1 Overview
The MC9S12H256 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 12K
bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), a serial
peripheral interface (SPI), an IIC-bus interface (IIC), an 8-channel 16-bit timer (TIM), a 16-channel, 10-bit
analog-to-digital converter (ATD), a six-channel pulse width modulator (PWM), and two CAN 2.0 A, B
software compatible modules (MSCAN).
The MC9S12H128 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip
peripherals including a 16-bit central processing unit (HCS12 CPU), 128K bytes of Flash EEPROM, 6K
bytes of RAM, 2K bytes of EEPROM, one asynchronous serial communications interface (SCI), a serial
peripheral interface (SPI), an IIC-bus interface (IIC), an 8-channel 16-bit timer (TIM), a 8-channel, 10-bit
analog-to-digital converter (ATD), a two-channel pulse width modulator (PWM), and two CAN 2.0 A, B
software compatible modules (MSCAN).
In addition, it features a 32x4 liquid crystal display (LCD) controller/driver and a motor pulse width
modulator (MC) consisting of 24 high current outputs suited to drive up to 6 stepper motors. System
resource mapping, clock generation, interrupt control, and bus interfacing are managed by the HCS12
Core.
The MC9S12H256 has full 16-bit data paths throughout. The inclusion of a PLL circuit allows power
consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports
available in each module, 12 general purpose I/O pins are available with interrupt and wake-up capability
from STOP or WAIT mode.
1.2 Features
• HCS12 Core
– 16-bit HCS12 CPU
i. Upward compatible with M68HC11 instruction set
ii. Interrupt stacking and programmer’s model identical to M68HC11
iii. 20-bit ALU
iv. Instruction queue
v. Enhanced indexed addressing
– MEBI (Multiplexed External Bus Interface)
– MMC (Module Mapping Control)
– INT (Interrupt control)
– BKP (Breakpoints)
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