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MC33999 Datasheet, PDF (14/21 Pages) Motorola, Inc – 16-Output Switch with SPI and PWM Control
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
filter of 100 µs to 450 µs is incorporated. The duration for
which a false fault may be reported is a function of the load
impedance, RDS(ON), COUT of the MOSFET, as well as the
supply voltage, VPWR. The rising edge of CS triggers the built-
in fault delay timer. The timer must time out before the fault
comparator is enabled to detect a faulted threshold. Once the
condition causing the Open Load Fault is removed, the
device resumes normal operation. The Open Load Fault,
however, will be latched in the output SO Response register
for the MCU to read.
SHORTED LOAD FAULT
A shorted load (overcurrent) fault can be caused by any
output being shorted directly to supply, or by an output
experiencing a current greater than the current limit.
Three safety circuits progressively in operation during load
short conditions afford system protection:
1. The device’s output current is monitored in an analog
fashion using a SENSEFET approach and is current
limited.
2. With the output in current limit, the drain-to-source
voltage increases. By setting the SFPD bit to 0, the
output shuts down on VDS > 2.7 V typical after 450 µs.
3. The output thermal limit of the device is sensed and,
when attained, causes only the specific faulted output
to shut down. The device remains OFF until cooled.
The device then operates as programmed by the
shutdown / retry bit. The cycle continues until the fault is
removed or the command bit instructs the output OFF.
All three protection schemes set the Fault Status bit (bit 23
in the SO Response register) to logic [1].
UNDERVOLTAGE SHUTDOWN
An undervoltage SOPWR condition results in the global
shutdown of all outputs and reset of all control registers. The
undervoltage threshold is between 2.0 V and 3.0 V.
An undervoltage condition at the VPWR pin results in an
output shutdown and reset. The undervoltage threshold is
between 3.2 V and 3.5 V. When VPWR is between 5.0 V and
3.5 V, the output may operate per the command word and the
status is reported on SO pin, though this is not guaranteed.
OUTPUT VOLTAGE CLAMP
Each output of the 33999 incorporates an internal voltage
clamp to provide fast turn-OFF and transient protection of
each output. Each clamp independently limits the drain-to-
source voltage to 50 V. The total energy clamped (EJ) can be
calculated by multiplying the current area under the current
curve (IA) times the clamp voltage (VCL) (see Figure 12).
Characterization of the output clamps, using a single pulse
non-repetitive method at 0.3 A, indicates the maximum
energy to be 50 mJ at 150°C junction temperature per output.
Drain-to-Source C lamp
DraiVno-tltoa-gSeo(uVrCcLe=C45l5a0mV))p
Voltage (VCL = 50 V)
DDraraininVVooltlataggee
DDrraaininCCuurrreenntt
((IDID==00.3.3AA))
ClCamlamp Ep nEenregrygy
(E(JE=J I=AIxA Vx CVLC)L)
DDrraain-ttoo--SSoouurcreceOON N
VVoollttaaggee ((VVDDSS(O(ON)N) ))
GGNNDD
Curren t
Area (IA )
TTimimee
Figure 12. Output Voltage Clamping
REVERSE BATTERY PROTECTION
The 33999 device requires external reverse battery
protection on the VPWR pin.
All outputs consist of a power MOSFET with an integral
substrate diode. During reverse battery condition, current will
flow through the load via the substrate diode. Under this
circumstance relays may energize and lamps will turn on. If
load reverse battery protection is desired, a diode must be
placed in series with the load.
OVERTEMPERATURE FAULT
Overtemperature Detect circuits are specifically
incorporated for each individual output. The shutdown
following an overtemperature condition depends on the
control bit set in the Retry / Shutdown Control register. Each
independent output shuts down at 155°C to 180°C. When an
output shuts down due to an Overtemperature Fault, no other
outputs are affected. The MCU recognizes the fault by a
logic [1] in the Fault Status bit (bit 23 in the SO Response
register). After the 33999 has cooled below the switch point
temperature and 10°C hysteresis, the output functions as
defined by the retry / shutdown bit 17 in the Global Shutdown /
Retry Control register.
33999
14
Analog Integrated Circuit Device Data
Freescale Semiconductor