MC33999 Datasheet, PDF (13/21 Pages) Motorola, Inc – 16-Output Switch with SPI and PWM Control

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
MC68HCXX
Microcontroller
Shift Register
Parallel
Ports
MOSI
MISO
SCLK
PWM1
PWM2
33999
SI
SO
SCLK
CS
PWM
RST
33999
SI
SO
SCLK
CS
PWM
RST
Figure 11. Parallel Inputs SI Control
POWER CONSUMPTION
The 33999 is designed with one Sleep mode and one
Operational mode. In Sleep mode (SO_PWR ≤ 2.0 V), the
current consumed by the VPWR pin is less than 50 µA.To
place the 33999 in Sleep mode, turn all outputs OFF and
remove power from the SOPWR pin. During normal
operation, 500 µA is drawn from the SO_PWR supply and
8.0 mA from the V_PWR supply.
PARALLELING OF OUTPUTS
Using MOSFETs as output switches allows the connection
of any combination of outputs together. The R_DS(ON) of
MOSFETs has an inherent positive temperature coefficient
providing balanced current sharing between outputs without
destructive operation. This mode of operation may be
desirable in the event the application requires lower power
dissipation or the added capability of switching higher
currents. Performance of parallel operation results in a
corresponding decrease in R_DS(ON), while the Output Current
Limit increases correspondingly. Output OFF Open Load
Detect current may increase based on how the Output OFF
Open Load Detect is programmed. Paralleling outputs from
two or more different IC devices is possible but not
recommended.
Care must be taken when paralleling outputs for inductive
loads. The Output Voltage Clamp of the output drivers may
not match. One MOSFET output must be capable of the
inductive energy from the load turn OFF.
SPI INTEGRITY CHECK
Checking the integrity of the SPI communication is
recommended upon initial power-up of the SOPWR pin. After
initial system startup or reset, the MCU writes one 48-bit
pattern to the 33999.
The first 24 bits read by the MCU is the fault status of the
outputs, while the second 24 bits is the first bit pattern sent.
By the MCU receiving the same bit pattern it sent, bus
integrity is confirmed. Please note the second 24 bits the
MCU sends to the 33999 are the command bits to program
registers or activate outputs on the rising edge of CS.
OUTPUT OFF OPEN LOAD FAULT
An Output OFF Open Load Fault is the detection and
reporting of an open load when the corresponding output is
disabled (input bit programmed to a logic low state). The
Output OFF Open Load Fault is detected by comparing the
drain-to-source voltage of the specific MOSFET output to an
internally generated reference. Each output has one
dedicated comparator for this purpose.
Each 33999 output has an internal 50 µA pulldown current
source. The pulldown current is disabled on power-up and
must be enabled for Open Load Detect to function. Once
enabled, the 33999 will only shut down the pulldown current
in Sleep mode or when disabled via SPI.
During output switching, especially with capacitive loads,
a false Output OFF Open Load Fault may be triggered. To
prevent this false fault from being reported, an internal fault
Analog Integrated Circuit Device Data
Freescale Semiconductor
33999
13