K61P144M120SF3 Datasheet, PDF (14/82 Pages) Freescale Semiconductor, Inc – K61 Sub-Family Data Sheet

General
Symbol
I_ICcont
Table 1. Voltage and current operating requirements (continued)
Description
Min.
Max.
Unit
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
• Negative current injection
-25
—
mA
• Positive current injection
—
+25
Notes
V_RAM
V_DD voltage required to retain RAM
1.2
—
V
V_RFVBAT V_BAT voltage required to retain the VBAT register file V_{POR_VBAT}
—
V
1. All 5 V tolerant digital I/O pins are internally clamped to V_SS through a ESD protection diode. There is no diode connection
to V_DD. If V_IN greater than V_{DIO_MIN} (=V_SS-0.3V) is observed, then there is no need to provide current limiting resistors at
the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection current
limiting resistor is calculated as R=(V_{DIO_MIN}-V_IN)/|I_IC|.
2. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
3. All analog pins are internally clamped to V_SS and V_DD through ESD protection diodes. If V_IN is greater than V_{AIO_MIN}
(=V_SS-0.3V) and V_IN is less than V_{AIO_MAX}(=V_DD+0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(V_{AIO_MIN}-V_IN)/|I_IC|. The positive injection current limiting resistor is
calcualted as R=(V_IN-V_{AIO_MAX})/|I_IC|. Select the larger of these two calculated resistances.
5.2.2 LVD and POR operating requirements
Table 2. LVD and POR operating requirements
Symbol
V_POR
V_LVDH
V_LVW1H
V_LVW2H
V_LVW3H
V_LVW4H
V_HYSH
V_LVDL
V_LVW1L
V_LVW2L
V_LVW3L
V_LVW4L
Description
Falling VDD POR detect voltage
Falling low-voltage detect threshold — high
range (LVDV=01)
Low-voltage warning thresholds — high range
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
Low-voltage inhibit reset/recover hysteresis —
high range
Falling low-voltage detect threshold — low range
(LVDV=00)
Low-voltage warning thresholds — low range
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
Min.
0.8
2.48
2.62
2.72
2.82
2.92
—
1.54
1.74
1.84
1.94
2.04
Typ.
1.1
2.56
2.70
2.80
2.90
3.00
±80
1.60
1.80
1.90
2.00
2.10
Max.
1.5
2.64
2.78
2.88
2.98
3.08
—
1.66
1.86
1.96
2.06
2.16
Table continues on the next page...
Unit
Notes
V
V
1
V
V
V
V
mV
V
1
V
V
V
V
K61 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
14
Preliminary
Freescale Semiconductor, Inc.