MC81F4216 Datasheet, PDF (61/200 Pages) Finechips – ABOV SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC81F4x16
Address
Register Name
Symbol
R/W
00B0
00B1
00B2
00B3
00B4
00B5
00B6
00B7
00B8
00B9
00BA
00BB
00BC
00BD
00BE
00BF
00C0
00C1
00C2
00C3
00C4
00C5
00C6
00C7
00C8
00C9
00CA
00CB
00CC
00CD
00CE
00CF
00D0
00D1
00D2
00D3
00D4
00D5
Timer 0 Status And Control Register T0SCR R/W
Timer 0 Data Register
T0DR
R/W
Timer 0 Counter Register
T0CR
R
Timer 1 Status And Control Register T1SCR R/W
Timer 1 Data Register
T1DR
R/W
Timer 1 Counter Register
T1CR
R
Timer 2 Status And Control Register T2SCR R/W
Timer 2 Data Register
T2DR
R/W
Timer 2 Counter Register
T2CR
R
Timer 3 Status And Control Register T3SCR R/W
Timer 3 Data Register
T3DR
R/W
Timer 3 Counter Register
T3CR
R
Oscillator Select Register
OSCSEL R/W
A/D Mode Register
ADMR
R/W
A/D Converter Data High Register
ADDRH
R
A/D Converter Data Low Register
ADDRL
R
R0 Port Data Register
R0
R/W
R1 Port Data Register
R1
R/W
R2 Port Data Register
R2
R/W
R3 Port Data Register
R3
R/W
R4 Port Data Register
R4
R/W
R5 Port Data Register
R5
R/W
R0 Port Control High Register
R0CONH R/W
R0 Port Control Middle Register
R0CONM R/W
R0 Port Control Low Register
R0CONL R/W
R0 Port Pull-up Enable Register
PUR0
R/W
R0 Port External Interrupt High
Register
EINT0H R/W
R0 Port External Interrupt Low
Register
EINT0L R/W
R0 Port External Interrupt Request
Register
ERQ0
R/W
External Interrupt Flag Register
EINTF
R/W
PWM Status And Control Register PWMSCR R/W
PWM Period And Duty Register
PWMPDR R/W
PWM2 Data Register
PWM2DR R/W
PWM3 Data Register
PWM3DR R/W
PWM4 Data Register
PWM4DR R/W
R1 Port Control High Register
R1CONH R/W
R1 Port Control Middle Register
R1CONM R/W
R1 Port Control Low Register
R1CONL R/W
Table 9-1 Control Register 1/4
Initial Value
Addressing
76543210
Mode
0 0 0 0 0 0 0 0 Byte, bit
1 1 1 1 1 1 1 1 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
– 0 0 0 0 0 0 0 Byte, bit
1 1 1 1 1 1 1 1 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
0 – 0 0 0 0 0 0 Byte, bit
1 1 1 1 1 1 1 1 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
– – 0 0 0 0 0 0 Byte, bit
1 1 1 1 1 1 1 1 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
– – – – – 0 0 0 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
X X X X X X X X Byte, bit
X X X X – – – – Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
1 1 1 1 1 0 0 0 Byte, bit
1 1 1 1 1 1 1 1 Byte, bit
– – 0 0 0 1 1 1 Byte, bit
1 1 1 1 1 1 1 1 Byte, bit
– – – – 1 1 1 1 Byte, bit
0 0 0 0 0 0 – 0 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
– – 0 0 0 0 0 0 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
0 0 0 0 0 0 0 0 Byte, bit
00000000
00000000
0000––––
11111111
11111111
11111111
11111111
01010101
001000––
–––00000
Byte, bit
Byte, bit
Byte, bit
Byte, bit
Byte, bit
Byte, bit
Byte, bit
Byte, bit
Byte, bit
Byte, bit
October 19, 2009 Ver.1.35
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