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MC81F4216 Datasheet, PDF (200/200 Pages) Finechips – ABOV SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS | |||
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MC81F4x16
NO. MNEMONIC
24 TCALL n
OP
BYTE CYCLE
CODE NO
NO
OPERATION
M( sp ) ï¬ ( pcL ), sp ï¬ sp â 1,
pcL ï¬ ( upage ), pcH ï¬ â0FFHâ
FLAG
NVGBHIZC
nA
1
8
Table call
M( sp ) ï¬ ( pcH ), sp ï¬ sp â 1,
M( sp ) ï¬ ( pcL ), sp ï¬ sp â 1,
pcL ï¬ ( Table vector L ), pcH ï¬ (Table vector H )
--------
Control Operation / Etc
NO. MNEMONIC
OP
BYTE CYCLE
CODE NO
NO
OPERATION
1
BRK
0F
1
8
2
DI
60
1
3
3
EI
E0
1
3
4
NOP
FF
1
2
5
POP A
0D
1
4
6
POP X
2D
1
4
7
POP Y
4D
1
4
8
POP PSW
6D
1
4
9
PUSH A
0E
1
4
10 PUSH X
2E
1
4
11 PUSH Y
4E
1
4
12 PUSH PSW
6E
1
4
13 RET
6F
1
5
14 RETI
15 STOP
7F
1
6
EF
1
3
Software interrupt : B ï¬ â1â,
M( sp ) ï¬ ( pcH ), sp ï¬ sp â 1,
M( sp ) ï¬ ( pcL ), sp ï¬ sp â 1,
M( sp ) ï¬ ( PSW ), sp ï¬ sp â 1,
pcL ï¬ ( 0FFDEH ), pcH ï¬ ( 0FFDFH )
Disable interrupt : I ï¬ â0â
Enable interrupt : I ï¬ â1â
No operation
sp ï¬ sp + 1, A ï¬ M( sp )
sp ï¬ sp + 1, X ï¬ M( sp )
sp ï¬ sp + 1, Y ï¬ M( sp )
sp ï¬ sp + 1, PSW ï¬ M( sp )
M( sp ) ï¬ A, sp ï¬ sp - 1
M( sp ) ï¬ X, sp ï¬ sp - 1
M( sp ) ï¬ Y, sp ï¬ sp - 1
M( sp ) ï¬ PSW, sp ï¬ sp - 1
Return from subroutine
sp ï¬ sp + 1, pcL ï¬ M( sp ),
sp ï¬ sp + 1, pcH ï¬ M( sp )
Return from interrupt
sp ï¬ sp + 1, PSW ï¬ M( sp ),
sp ï¬ sp + 1, pcL ï¬ M( sp ),
sp ï¬ sp + 1, pcH ï¬ M( sp )
Stop mode ( halt CPU, stop oscillator )
FLAG
NVGBHIZC
---1-0--
-----0--
-----1--
--------
--------
restored
--------
--------
restored
--------
200
October 19, 2009 Ver.1.35
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