FAN3100_09 Datasheet, PDF (6/21 Pages) Fairchild Semiconductor – Single 2A High-Speed, Low-Side Gate Driver

Electrical Characteristics
Unless otherwise noted, VDD = 12V, TJ = -40°C to +125°C. Currents are defined as positive into the device and
negative out of the device.
Symbol
Parameter
Conditions
Supply
VDD
Operating Range
IDD
Supply Current
Inputs/EN Not Connected
FAN3100C⁽⁸⁾
FAN3100T
VON
VOFF
Turn-On Voltage
Turn-Off Voltage
Inputs (FAN3100T)
VINL_T IN+, IN- Logic Low Voltage, Maximum
VINH_T IN+, IN- Logic High Voltage, Minimum
IIN+
Non-inverting Input
IIN-
Inverting Input
VHYS IN+, IN- Logic Hysteresis Voltage
Inputs (FAN3100C)
IN from 0 to VDD
IN from 0 to VDD
VINL_C
VINH_C
IINL
IINH
VHYS_C
IN+, IN- Logic Low Voltage
IN+, IN- Logic High Voltage
IN Current, Low
IN Current, High
IN+, IN- Logic Hysteresis Voltage
IN from 0 to VDD
IN from 0 to VDD
Output
ISINK
OUT Current, Mid-Voltage, Sinking⁽⁹⁾
OUT at VDD/2,
CLOAD = 0.1µF, f = 1kHz
ISOURCE OUT Current, Mid-Voltage, Sourcing⁽⁹⁾
IPK_SINK
IPK_SOURCE
tRISE
tFALL
tD1, tD2
tD1, tD2
IRVS
OUT Current, Peak, Sinking⁽⁹⁾
OUT Current, Peak, Sourcing⁽⁹⁾
Output Rise Time⁽¹⁰⁾
Output Fall Time⁽¹⁰⁾
Output Prop. Delay, CMOS Inputs⁽¹⁰⁾
Output Prop. Delay, TTL Inputs⁽¹⁰⁾
Output Reverse Current Withstand⁽⁹⁾
OUT at VDD/2,
CLOAD = 0.1µF, f = 1kHz
CLOAD = 0.1µF, f = 1kHz
CLOAD = 0.1µF, f = 1kHz
CLOAD = 1000pF
CLOAD = 1000pF
0 - 12VIN; 1V/ns Slew Rate
0 - 5VIN; 1V/ns Slew Rate
Note:
8. Lower supply current due to inactive TTL circuitry.
9. Not tested in production.
10. See Timing Diagrams of Figure 7 and Figure 8.
Min. Typ. Max. Unit
4.5
18.0 V
0.20 0.35 mA
0.5 0.8 mA
3.5 3.9 4.3
V
3.3 3.7 4.1
V
0.8
V
2.0
V
-1
175 µA
-175
1
µA
0.2 0.4 0.8
V
30
%VDD
70 %VDD
-1
175 µA
-175
1
µA
17
%VDD
2.5
A
-1.8
A
3
A
-3
A
13
20
ns
9
14
ns
7
15 28
ns
9
16 30
ns
500
mA
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.2
6
www.fairchildsemi.com