FAN3100_09 Datasheet, PDF (3/21 Pages) Fairchild Semiconductor – Single 2A High-Speed, Low-Side Gate Driver

Pin Definitions
SOT23 MLP
Pin # Pin #
1
3
2
2
3
1
4
6
5
4
Pad
5
Name
Pin Description
VDD Supply Voltage. Provides power to the IC.
AGND Analog ground for input signals (MLP only). Connect to PGND underneath the IC.
GND Ground (SOT-23 only). Common ground reference for input and output circuits.
IN+ Non-Inverting Input. Connect to VDD to enable output.
IN- Inverting Input. Connect to AGND or PGND to enable output.
OUT
Gate Drive Output: Held low unless required inputs are present and VDD is above
UVLO threshold.
P1
Thermal Pad (MLP only). Exposed metal on the bottom of the package which is
electrically connected to pin 5.
PGND
Power Ground (MLP only). For output drive circuit; separates switching noise from
inputs.
Output Logic
IN+
IN−
OUT
0⁽⁷⁾
0
0
0⁽⁷⁾
1⁽⁷⁾
0
1
0
1
1
1⁽⁷⁾
0
Note:
7. Default input signal if no external connection is made.
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.2
3
www.fairchildsemi.com