FAN3100_09 Datasheet, PDF (16/21 Pages) Fairchild Semiconductor – Single 2A High-Speed, Low-Side Gate Driver

Operational Waveforms
At power up, the driver output remains low until the VDD
voltage reaches the turn-on threshold. The magnitude
of the OUT pulses rises with VDD until steady-state VDD
is reached. The non-inverting operation illustrated in
Figure 47 shows that the output remains low until the
UVLO threshold is reached, then the output is in-phase
with the input.
Figure 47. Non-Inverting Start-Up Waveforms
For the inverting configuration of Figure 46, start-up
waveforms are shown in Figure 48. With IN+ tied to
VDD and the input signal applied to IN–, the OUT
pulses are inverted with respect to the input. At power
up, the inverted output remains low until the VDD voltage
reaches the turn-on threshold, then it follows the input
with inverted phase.
Figure 48. Inverting Start-Up Waveforms
Thermal Guidelines
Gate drivers used to switch MOSFETs and IGBTs at
high frequencies can dissipate significant amounts of
power. It is important to determine the driver power
dissipation and the resulting junction temperature in the
application to ensure that the part is operating within
acceptable temperature limits.
The total power dissipation in a gate driver is the sum of
two components; PGATE and PDYNAMIC:
PTOTAL = PGATE + PDYNAMIC
(1)
Gate Driving Loss: The most significant power loss
results from supplying gate current (charge per unit
time) to switch the load MOSFET on and off at the
switching frequency. The power dissipation that
results from driving a MOSFET at a specified gate-
source voltage, VGS, with gate charge, QG, at
switching frequency, fSW, is determined by:
PGATE = QG • VGS • FSW
(2)
Dynamic Pre-drive / Shoot-through Current: A power
loss resulting from internal current consumption
under dynamic operating conditions, including pin
pull-up / pull-down resistors, can be obtained using
the IDD (no-Load) vs. Frequency graphs in Typical
Performance Characteristics to determine the
current IDYNAMIC drawn from VDD under actual
operating conditions:
PDYNAMIC = IDYNAMIC • VDD
(3)
Once the power dissipated in the driver is determined,
the driver junction rise with respect to circuit board can
be evaluated using the following thermal equation,
assuming ψJB was determined for a similar thermal
design (heat sinking and air flow):
TJ = PTOTAL • ψJB + TB
(4)
where:
TJ = driver junction temperature
ψ_JB = (psi) thermal characterization parameter relating
temperature rise to total power dissipation
TB = board temperature in location defined in the
Thermal Characteristics table.
In a typical forward converter application with 48V input,
as shown in Figure 49, the FDS2672 would be a
potential MOSFET selection. The typical gate charge
would be 32nC with VGS = VDD = 10V. Using a TTL input
driver at a switching frequency of 500kHz, the total
power dissipation can be calculated as:
PGATE = 32nC • 10V • 500kHz = 0.160W
(5)
PDYNAMIC = 8mA • 10V = 0.080W
(6)
PTOTAL = 0.24W
(7)
The 5-pin SOT23 has a junction-to-lead thermal
characterization parameter ψJB = 51°C/W.
In a system application, the localized temperature
around the device is a function of the layout and
construction of the PCB along with airflow across the
surfaces. To ensure reliable operation, the maximum
junction temperature of the device must be prevented
from exceeding the maximum rating of 150°C; with 80%
derating, TJ would be limited to 120°C. Rearranging
Equation 4 determines the board temperature required
to maintain the junction temperature below 120°C:
TB,MAX = TJ - PTOTAL • ψJB
(8)
TB,MAX = 120°C – 0.24W • 51°C/W = 108°C (9)
For comparison purposes, replace the 5-pin SOT23
used in the previous example with the 6-pin MLP
package with ψJB = 2.8°C/W. The 6-pin MLP package
can operate at a PCB temperature of 119°C, while
maintaining the junction temperature below 120°C. This
illustrates that the physically smaller MLP package with
thermal pad offers a more conductive path to remove
the heat from the driver. Consider the tradeoffs between
reducing overall circuit size with junction temperature
reduction for increased reliability.
© 2007 Fairchild Semiconductor Corporation
FAN3100 • Rev. 1.0.2
16
www.fairchildsemi.com