74F433 Datasheet, PDF (6/16 Pages) Fairchild Semiconductor – First-In First-Out (FIFO) Buffer Memory

FIGURE 4. A Vertical Expansion Scheme
Horizontal Expansion—The 74F433 can be horizontally
expanded, without external logic, to store long words (in
multiples of 4-bits). The interconnections necessary to form
a 64-word by 12-bit FIFO are shown in Figure 5. Using the
same technique, any FIFO of 64-words by 4n-bits can be
constructed, where n is the number of devices.
The right-most (most significant) device is connected to the
TTS inputs of all devices. Similarly, the ORE output of the
most significant device is connected to the TOS inputs of
all devices. As in the vertical expansion scheme, horizontal
expansion does not sacrifice any of the 74F433 flexibility
for serial/parallel input and output.
It should be noted that the horizontal expansion scheme
shown in Figure 5 exacts a penalty in speed.
Horizontal and Vertical Expansion—The 74F433 can be
expanded in both the horizontal and vertical directions
without any external components and without sacrificing
any of its FIFO flexibility for serial/parallel input and output.
The interconnections necessary to form a 127-word by 16-
bit FIFO are shown in Figure 6. Using the same technique,
any FIFO of (63m+1)-words by 4n-bits can be configured,
where m is the number of devices in a column and n is the
number of devices in a row. Figure 7 and Figure 8 illustrate
the timing diagrams for serial data entry and extraction for
the FIFO shown in Figure 6. Figure 9 illustrates the final
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