74F433 Datasheet, PDF (15/16 Pages) Fairchild Semiconductor – First-In First-Out (FIFO) Buffer Memory

Timing Waveforms (Continued)
Conditions: Stack not full, IES LOW when initialized
NOTE A: TTS normally connected to IRF.
NOTE B: If stack is full, IRF will stay LOW.
FIGURE 17. Parallel Load Mode, 4-Bit Word (Unexpanded) or Master in Parallel Expansion
Conditions: Stack not full, device initialized (Note 3) with IES HIGH
Note 3: Initialization requires a master reset to occur after power has been applied.
FIGURE 18. Parallel Load, Slave Mode
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