FAB2210 Datasheet, PDF (20/35 Pages) Fairchild Semiconductor – Audio Subsystem with Class-G Headphone and 3.3W Mono Class-D Speaker with Dynamic Range Compression

Register Map
The I²C slave address is 1001101X, where X=0 for write operations and X=1 for read operations.
ADDR B7
B6
B5
B4
B3
B2
B1
B0
0x15
REVISION_ID[2:0]
RSVD
RSVD
DCERR_TIME[1:0]
0
0x1A
0
SOFTVOL
RSVD
0x1B
0
DRCMIN[6:0]
0x1D
MCSSMT[2:0]
SSMT[2:0]
ERC
0
0x80 SRST
0
0
0
0
1
0
0
0x81
DRC_MODE[1:0]
DATRT[1:0]
NG_ATRT[1:0]
0
MODESEL
0x82
DPLT[2:0]
HP_NG_RAT[2:0]
HP_NG_ATT[1:0]
0x83
0
0
NCLIP
SP_NG_RAT[2:0]
SP_NG_ATT[1:0]
0x84
VA[3:0]
VB[3:0]
0x85 DIFA
DIFB
0
0
HP_SVOFF HP_HIZ SP_SVOFF SP_HIZ
0x86
0
SP_ATT[6:0]
0x87
0
HP_ATT[6:0]
0x88 OCP_ERR OTP_ERR DC_ERR HP_MONO HP_AMIX HP_BMIX SP_AMIX SP_BMIX
0xC0
0
DALC[2:0]
HP_GAIN[1:0]
SP_GAIN[1:0]
0xC1
0
0
0
0
0
HP_ZCSOFF
0
SP_ZCSOFF
Notes:
6. Bits labeled “0” are reserved. Only zeros should be written to these bits.
7. Bits labeled “1” are reserved. Only ones should be written to these bits.
8. Bits labeled “RSVD” are for testing only. Writing to these bits has no effect. When read, they may return any value.
9. Bits and addresses not listed in the register map are for testing only. These bits should never be written. When
read, they may return any value.
Register Descriptions
ADDR
0x15
Default
B7
B6
B5
REVISION_ID[2:0]
0
1
1
B4
B3
B2
B1
B0
RSVD
RSVD
DCERR_TIME[1:0]
0
0
0
0
REVISION_ID[2:0]
(read only)
011 = Silicon revision 3.
DCERR_TIME[1:0]
DC error time control
11=DC output detection disabled
10=15ms
01=5ms
00=2ms
ADDR
B7
B6
B5
B4
B3
B2
B1
B0
0x1A
0
SOFTVOL
RSVD
Default
0
0
© 2011 Fairchild Semiconductor Corporation
FAB2210 • Rev. 1.1.1
20
www.fairchildsemi.com