FAN54013_12 Datasheet, PDF (19/36 Pages) Fairchild Semiconductor – FAN54010 / FAN54011 / FAN54012 / FAN54013 / FAN54014

PWM Controller in Charge Mode
The IC uses a current-mode PWM controller to regulate the
output voltage and battery charge currents. The synchronous
rectifier (Q2) has a negative current limit that turns off Q2 at
140 mA to prevent current flow from the battery.
Safety Timer
Section references Figure 41 and Figure 42.
At the beginning of charging, the IC starts a 15-minute timer
(t_15MIN ). When this timer times out, charging is terminated.
Writing to any register through I²C stops and resets the t_15MIN
timer, which in turn starts a 32-second timer (t_32S). Setting
the TMR_RST bit (REG0[7]) resets the t_32S timer. If the t_32S
timer times out, charging is terminated, the registers are set
to their default values, and charging resumes using the
default values with the t_15MIN timer running.
Normal charging is controlled by the host with the t_32S timer
running to ensure that the host is alive. Charging with the
t_15MIN timer running is used for charging that is unattended by
the host. If the t_15MIN timer expires, the IC turns off the
charger, sets the CE bit, and indicates a timer fault (110) on
the FAULT bits (REG0[2:0]). This sequence prevents
overcharge if the host fails to reset the t_32S timer.
V_BUS POR / Non-Compliant Charger Rejection
When the IC detects that V_BUS has risen above V_IN(MIN)1
(4.4 V), the IC applies a 100 load from VBUS to GND. To
clear the VBUS POR (Power-On-Reset) and begin charging,
VBUS must remain above V_IN(MIN)1 and below VBUS_OVP for
t_{VBUS_VALID} (30 ms) before the IC initiates charging. The
VBUS validation sequence always occurs before charging is
initiated or re-initiated (for example, after a VBUS OVP fault
or a V_RCH recharge initiation).
t_{VBUS_VALID} ensures that unfiltered 50/60 Hz chargers and
other non-compliant chargers are rejected.
USB-Friendly Boot Sequence
For FAN54010/12/13, NOT FAN54011/14
At VBUS POR, when the battery voltage is above the weak
battery threshold (V_LOWV), the IC operates in accordance with
its I²C register settings. If V_BAT < V_LOWV, the IC sets all
registers to their default values and enables the charger
using an input current limit controlled by the OTG pin
(100 mA if OTG is LOW and 500 mA if OTG is HIGH). This
feature can revive a battery whose voltage is too low to
ensure reliable host operation. Charging continues in the
absence of host communication even after the battery has
reached V_OREG, whose default value is 3.54 V, and the
charger remains active until t_15MIN times out. Once the host
processor begins writing to the IC, charging parameters are
set by the host, which must continually reset the t_32S timer to
continue charging using the programmed charging
parameters. If t_32S.times out, the register defaults are loaded,
the FAULT bits are set to 110, STAT is pulsed HIGH, and
charging continues with default charge parameters.
The FAN54011 and FAN54014 do not automatically initiate
charging at VBUS POR. Instead, they wait for the host to
initiate charging through I²C commands.
Input Current Limiting
To minimize charging time without overloading VBUS current
limitations, the IC’s input current limit can be programmed by
the I_INLIM bits (REG1[7:6]).
Table 7. Input Current Limit
I_INLIM REG1[7:6]
00
01
10
11
Input Current Limit
100 mA
500 mA
800 mA
No limit
For all versions except the FAN54011/14, the OTG pin
establishes the input current limit when t_15MIN is running. For
the FAN54011 and FAN54014, no charging occurs
automatically at VBUS POR; the input current limit is
established by the I_INLIM bits.
© 2011 Fairchild Semiconductor Corporation
FAN5401X Family • Rev. 1.0.4
19
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