FIN12AC_08 Datasheet, PDF (16/21 Pages) Fairchild Semiconductor – Low-Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges

AC Loading and Waveforms (Continued)
Setup Time
STROBE
DP[1:12]
t_STC
Data
Hold Time
t_HTC
STROBE
DP[1:12]
Data
Setup: MODE0 = “0” or “1”, MODE1 = “1”, SER/DES = “1”
Figure 12. Serial Setup and Hold Time
Data Time
CKP
DP[1:12]
t_PDV
Data
t_RCOP
75%
CKREF ^50%
t_RCOH
50%
25%
t_RCOL
Setup: DIRI = “0”, CKSI and DS are valid signals.
Figure 14. Deserializer Data Valid Window Time and
Clock Output Parameters
t_CLKT
90% 90%
t_CLKT
10%
10%
t_TCP
CKREF _50% ^VIH
t_CPWH
V_IL
t_CPWL
50%
Figure 13. LVCMOS Clock Parameters
V_DD/V_DDA
S1 or S2
t_TPLLS0
CKREF
CKS0
Note: CKREF Signa is free running.
Figure 15. Serializer PLL Lock Time
© 2006 Fairchild Semiconductor Corporation
FIN12AC Rev. 1.1.2
16
www.fairchildsemi.com