FIN12AC_08 Datasheet, PDF (15/21 Pages) Fairchild Semiconductor – Low-Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges

AC Loading and Waveforms
Input
DS+
R_L/2
R_L/2
V_OD
DS-
V_OS
Figure 7. Differential CTL
Output DC Test Circuit
DUT
+
–
DUT
+
–
100Ω Termination
+
–
VGO
Figure 8. CTL Input Common
Mode Test Circuit
T
DP[1:24]
666h
999h
666h
CKREF
CKS0-
Note:
The “worst-case” test pattern produces a maximum toggling of internal digital curcuits, CTL I/O and LVCMOS I/O with PLL operating at the reference frequency,
unless otherwise specified. Maximum power is measured at the maximum V_DD values. Minimum values are measured at the minimum V_DD values.
Typical values are measured at V_DD = 2.5V.
Figure 9. “Worst Case” Serializer Test Pattern
t_TLH
V_DIFF 20%
80% 80%
t_THL
20%
V_DIFF = (DS+) – (DS-)
DS+
+
–
5 pF 100Ω
DS-
Figure 10. CTL Output Load
and Transition Times
t_ROLH
DPn 20%
80% 80%
t_ROHL
20%
DPn
5pF _1000Ω
Figure 11. LVCMOS Output Load
and Transition Times
© 2006 Fairchild Semiconductor Corporation
FIN12AC Rev. 1.1.2
15
www.fairchildsemi.com