FIN12AC_08 Datasheet, PDF (12/21 Pages) Fairchild Semiconductor – Low-Voltage 12-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges

Power Supply Currents
The worst-case test pattern produces a maximum toggling of internal digital circuits, CTL I/O and LVCMOS I/O with the
PLL operating at the reference frequency unless otherwise specified. Maximum power is measured at the maximum
V_DD values. Minimum values are measured at the minimum V_DD values. Typical values are measured at V_DD = 2.5V.
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
I_DDA1
All DP and Control Inputs at 0V or
V_DDA Serializer Static Supply Current V_DD NOCKREF, S2 = 0, S1 = 1,
DIR = 1
437
µA
I_DDA2
V_DDA Deserializer Static Supply
Current
All DP and Control Inputs at 0V or
V_DD NOCKREF, S2 = 0, S1 = 1,
DIR = 0
528
µA
I_DDS1
All DP and Control Inputs at 0V or
V_DDS Serializer Static Supply Current V_DD NOCKREF, S2 = 0, S1 = 1,
DIR = 1
4.4
mA
I_DDS2
V_DDS Deserializer Static Supply
Current
All DP and Control Inputs at 0V or
V_DD NOCKREF, S2 = 0, S1 = 1,
DIR = 0
5.5
mA
I_{DD_PD}
V_DD Power-Down Supply Current
I_{DD_PD} = I_DDA + I_DDS + I_DDP
S1 = S2 = 0
All Inputs at GND or V_DD
1.0
µA
S2 = H 5MHz
8.5
S1 = L 14MHz
15.0
14:1 Dynamic Serializer
CKREF = STROBE _{S2 = H 10MHz}
9.5
I_{DD_SER1} Power Supply Current
I_{DD_SER1} = I_DDA + I_DDS + I_DDP
DIRI = H
Figure 10
S1 = H 28MHz
17.0
mA
S2 = L 20MHz
11.0
S1 = H 40MHz
17.0
S2 = H ^5MHz
6.5
S1 = L 14MHz
7.5
I_{DD_DES1}
14:1 Dynamic Deserializer
Power Supply Current
I_{DD_DES1} = I_DDA + I_DDS + I_DDP
CKREF = STROBE
DIRI = L
S2 = H
10MHz
Figure 10
S1 = H 28MHz
7.0
10.0
mA
S2 = L ^20MHz
8.5
S1 = H 40MHz
11.5
© 2006 Fairchild Semiconductor Corporation
FIN12AC Rev. 1.1.2
12
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