FMT1000 Datasheet, PDF (13/29 Pages) Fairchild Semiconductor – Motion Tracking Module with Output of Orientation, Inertial Motion Data and Magnetic Field

Table 5. Timing Specifications
Symbol
Parameter
Min. Max. Unit
T1
Slave select to first
complete word delay
4
T2 Byte time
4
T3
Consecutive SPI transfer
guard time
3
Max. SPI bitrate
μs
μs
μs
2 Mbit
1.7.6 UART Half Duplex
The FMT1000-series module can be configured to
communicate over UART in half duplex mode. The
UART frame configuration is 8 data bits, no parity and 1
stop bit (8N1). In addition to the RX and TX pins, the
control lines nRE and DE are used. These control
outputs are used to drive the TX signal on a shared
medium and to drive the signal of the shared medium on
the RX signal.
A typical use case for this mode is to directly drive a
RS485 transceiver where the shared medium is the
RS485 signal and nRE and DE lines control the buffers
inside the transceiver.
When the FMT is transmitting data on its TX pin it will
raise both the nRE and DE lines, else it will pull these
lines low.
Figure 11. Behavior of the nRE and DE Lines
Note that in this mode the UART of the FMT1000-series
itself is still operating full duplex.
1.7.7 UART Full Duplex with RTS/CTS Flow
Control
The FMT1000-series module can be configured to
communicate over UART in full duplex mode with
RTS/CTS flow control. The UART frame configuration is
8 data bits, no parity and 1 stop bit (8N1). In addition to
the RX and TX signals for data communication the RTS
and CTS signals are used for hardware flow control.
The CTS signal is an input for the FMT. The FMT
checks the state of the CTS line at the start of every
byte it transmits. If CTS is low the byte will be
transmitted. Otherwise transmission is postponed until
CTS is lowered. When during the transmission of a byte
the CTS signal is raised, then the transmission of that
byte is completed before postponing further output. This
byte will not be retransmitted. This behavior is shown in
the following image:
Figure 12. Data Transmit Behavior Under CTS
The RTS signal is an output for the FMT. If the RTS line
is high, the FMT is busy and unable to receive new
data. Otherwise the FMT‟s UART is idle and ready to
receive. After receiving a byte the DMA controller of the
FMT will transfer the byte to its receive FIFO. The RTS
signal will be asserted during this transfer. So with every
byte received the RTS line is raised shortly like shown in
the following image:
Figure 13. FRTS Behavior Under Data Reception
This communication mode can be used without hardware flow control. In this case the CTS line needs to be tied low
(GND) to make the FMT transmit.
© 2015 Fairchild Semiconductor Corporation
FMT1000-series • Rev. 1.0
13
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