FAN5182_08 Datasheet, PDF (11/19 Pages) Fairchild Semiconductor – Adjustable Output, 1-, 2-, or 3-Phase Synchronous Buck Controller

The latch-off function can be reset by removing and
reapplying VCC or by pulling the EN pin low briefly. To
disable the over-current latch-off function, the external
resistor connecting the DELAY pin and ground should
be removed and a high-value resistor (>1MΩ) should be
connected from the DELAY pin to VCC. This prevents
the delay capacitor from discharging, so the 1.8V
threshold can never be reached. This pull-up resistor
has some impact to the soft-start time because the
current through this resistor adds additional current to
the internal 20µA soft-start current.
During start-up, when the output voltage is below
200mV, a secondary current limit is activated. This is
necessary because the voltage swing of CSCOMP
cannot go below ground. This secondary current limit
clamps the COMP voltage to 2V.
An inherent, per-phase current limit protects individual
phases if one or more phases cease to function
because of a faulty component. This limit is based on
the maximum normal mode COMP voltage.
Power-Good Monitoring
The power-good comparator monitors the output
voltage via the FB pin. The PWRGD pin is an open-
drain output whose high level (when connected to a
pull-up resistor) indicates that the output voltage is
within the nominal limits specified in the Electrical
Characteristic table. PWRGD goes low if the output
voltage is outside the specified range or whenever the
EN pin is pulled low. Figure 10 shows the PWRGD
response when the input power supply is switched off.
Enable and UVLO
To begin switching, the input supply (VCC) to the
controller must be higher than the UVLO threshold, and
the EN pin must be higher than its logic threshold. If
UVLO is less than the threshold or the EN pin is logic
low, the FAN5182 is disabled. This holds the PWM
outputs at ground, shorts the delay capacitor to ground,
and holds the ILIMIT pin at ground.
In the application circuit, the ILIMIT pin should be
connected to the OD pins of the FAN5109 drivers.
Grounding the ILIMIT pin disables the drivers such that
both HDRV and LDRV hold low. This feature is
important in preventing fast discharge of the output
capacitors when the controller shuts off. If the driver
outputs are not disabled, a negative output voltage can
be generated due to high current discharged from the
output capacitors through the inductors.
FAN5182 in Single-Phase Applications
NOTE: When the FAN5182 is configured for single-
phase applications, it is actually operating internally as
a two-phase controller. It therefore should be configured
as a two-phase controller with only one phase
populated externally.
To accomplish this, PWM3 needs be grounded (to
configure the FAN5182 as a two-phase controller) and
the clock frequency set to two times the required phase
switching frequency. PWM1 should be used to drive the
external phase electronics (driver and MOSFETs). The
SW2 and SW3 pins should be connected to ground to
minimize any potential spurious noise paths.
WARNING: Do not connect PWM2 to ground.
As noted above, when using the FAN5182 in single-
phase applications, it is actually operating internally as
a two-phase controller and PWM2 may be switching.
Figure 10. Shutdown Waveforms
As part of the protection for the load and output
components of the supply, the PWM outputs are driven
low (turning on the low-side MOSFETs) when the output
voltage exceeds the crowbar trip point. This crowbar
action stops once the output voltage falls below the
reset threshold of approximately 650mV.
Turning on the low-side MOSFETs pulls down the
output as the reverse current builds up in the inductors.
If the output over-voltage is due to a short in the high-
side MOSFET, this crowbar action can trip the input
supply over-current protection or blow the input fuse,
protecting the load from damage.
FAN5182 as a Voltage-Mode Controller
The SW pins are used to measure the current flowing
through the bottom FET. This current information is
used to balance the phase currents in a multiphase
application and create an inner current-feedback loop in
the control loop, making the FAN5182 a current-mode
controller.
In single-phase applications where phase current
balance is not required, the current loop can be
defeated by disconnecting the SW pins from the output
FETs and shorting the SW pin to ground. This changes
the control loop from current-mode control to voltage-
mode control.
WARNING: The compensation requirements for a
voltage-mode control design differ for current-mode
control design. The Application Information section of
this datasheet is for a current-mode control design. The
compensation section “Closed-Loop Compensation
Design” does not apply to voltage-mode designs.
© 2005 Fairchild Semiconductor Corporation
FAN5182 • Rev. 1.1.3
11
www.fairchildsemi.com