XR82C684CJ-F Datasheet, PDF (97/107 Pages) Exar Corporation – CMOS Quad Channel UART(QUART)

XR82C684
Bit 7
BRG Set
Select
 L 
 L 
Bit 6
Bit 5
Bit 4
Counter/Timer #2 Mode and Source
 Table 13
Bit 3
! $+
$ 
 L 
 L :
Bit 2
! $+
$ 
 L 
 L :
Table 36. Auxiliary Control Register 2: ACR2
Bit 1
! $+
$ 
 L 
 L :
Bit 0
! $+0
$ 
 L 
 L :
Bit 7
Delta IP3
L:
 L H%
Bit 6
Delta IP2
L:
 L H%
Bit 5
Delta IP1
L:
 L H%
Bit 4
Delta IP0
L:
 L H%
Bit 3
IP3
L< 3
 L ;(,
Bit 2
IP2
L< 3
 L ;(,
Bit 1
IP1
L< 3
 L ;(,
Table 37. Input Port Configuration Register 1, IPCR1
Bit 0
IP0
L< 3
 L ;(,
Bit 7
Delta IP11
L:
 L H%
Bit 6
Delta IP10
L:
 L H%
Bit 5
Delta IP9
L:
 L H%
Bit 4
Delta IP8
L:
 L H%
Bit 3
IP11
L< 3
 L ;(,
Bit 2
IP10
L< 3
 L ;(,
Bit 1
IP9
L< 3
 L ;(,
Table 38. Input Port Configuration Register 2, IPCR2
Bit 0
IP8
L< 3
 L ;(,
Bit 7
Input Port
Change
L:
 L H%
Bit 6
Delta Break
B
L:
 L H%
Bit 5
RXRDY/
FFULLB
L:
 L H%
Bit 4
TXRDYB
L:
 L H%
Bit 3
Counter #1
Ready
L:
 L H%
Bit 2
Delta Break
A
L:
 L H%
Bit 1
RXRDY/
FFULLA
L:
 L H%
Table 39. Interrupt Status Register 1, ISR1
Bit 0
TXRDYA
L:
 L H%
Bit 7
Input Port
Change
L:
 L H%
Bit 6
Delta Break
D
L:
 L H%
Bit 5
RXRDY/
FFULLD
L:
 L H%
Bit 4
TXRDYD
L:
 L H%
Bit 3
Counter #2
Ready
L:
 L H%
Bit 2
Delta Break
C
L:
 L H%
Bit 1
RXRDY/
FFULLC
L:
 L H%
Table 40. Interrupt Status Register 2, ISR2
Bit 0
TXRDYC
L:
 L H%
Bit 7
Input Port
Change
 L **
 L 
Bit 6
Delta Break
B
 L **
 L 
Bit 5
RXRDY/
FFULLB
 L **
 L 
Bit 4
TXRDYB
 L **
 L 
Bit 3
Counter #1
Ready
 L **
 L 
Bit 2
Delta Break
A
 L **
 L 
Bit 1
RXRDY/
FFULLA
 L **
 L 
Table 41. Interrupt Mask Register 1, IMR1
Bit 0
TXRDYA
 L **
 L 
 
B