XR82C684CJ-F Datasheet, PDF (96/107 Pages) Exar Corporation – CMOS Quad Channel UART(QUART)

XR82C684
Bit 7
Bit 6
Bit 5
Miscellaneous Commands
 " ( Section B.2
Bit 4
Bit 3
Bit 2
Enable/Disable Tx
 L :
 ,
 L 5  "
 L !(% "
 L :   3
! :  %
Table 31. Command Registers: CRA, CRB, CRC, CRD
Bit 1
Bit 0
Enable/Disable Rx
 L :
 ,
 L 5  "
 L !(% "
 L :   3
! :  %
Bit 7
Received
Break
L:
 L H%
Bit 6
Framing
Error
L:
 L H%
Bit 5
Parity Error
L:
 L H%
Bit 4
Overrun
Error
L:
 L H%
Bit 3
TXEMT
L:
 L H%
Bit 2
TXRDY
L:
 L H%
Table 32. Status Registers: SRA, SRB, SRC, SRD
Bit 1
FFULL
L:
 L H%
Bit 0
RXRDY
L:
 L H%
Bit 7
OP7
L+PBQ
L8!H)
Bit 6
OP6
L+P.Q
L8!H
Bit 5
OP5
L+P9Q
L8!H-
 <<)
Bit 4
OP4
L+P@Q
L8!H-
 <<
Bit 3
Bit 2
OP3
 L +P4Q
 L
- D 
 L 8
) 8
 L 8
) 8
Table 33. Output Port Configuration Register 1: OPCR1
Bit 1
Bit 0
OP2
 L +PQ
 L 8
 .8
 L 8
 8
 L 8
 8
Bit 7
OP7
L+PBQ
L8!H!
Bit 6
OP6
L+P.Q
L8!H

Bit 5
OP5
L+P9Q
L8!H-
 <<!
Bit 4
OP4
L+P@Q
L8!H-
 <<

Bit 3
Bit 2
OP3
 L +P4Q
 L
- D 
 L 8
! 8
 L 8
! 8
Bit 1
Bit 0
OP2
 L +PQ
 L 8

.8
 L 8

8
 L 8

8
Table 34. Output Port Configuration Register 2: OPCR2
Bit 7
BRG Set
Select
 L 
 L 
Bit 6
Bit 5
Bit 4
Counter/Timer #1 Mode and Source
 Table 13
Bit 3
Delta IP3
Interrupt
 L 
 L :
Bit 2
Delta IP2
Interrupt
 L 
 L :
Table 35. Auxiliary Control Register 1: ACR1
Bit 1
Delta IP1
Interrupt
 L 
 L :
Bit 0
Delta IP0
Interrupt
 L 
 L :
 
.