XR82C684CJ-F Datasheet, PDF (23/107 Pages) Exar Corporation – CMOS Quad Channel UART(QUART)

XR82C684
   *(  % *    (  (   %# *  3( ,
 
 , * 
   ( %'(( * $+
# % % Section E
Please note that in order to enable this Interrupt
Condition, the user must do two things:
1. Write the appropriate data to the lower nibble of the
Auxiliary Control Register, ACR2[3:0]. In this step, the
user is specifying which of the four Input Pins (IP8 -
IP11) should trigger an “Input Port Change” Interrupt
request.
2. Write a logic “1” to IMR2[7].
ISR2[6] Delta Break Indicator - Channel D:
E   (% ( (% %# ( ( ('%    
  !
'( % '   ,( ( ,    *  '(
6 )  (% ( (% '   % 3   
+
(  6%  '   ! /% )6
 , $ 1
'   % Table 2     ( * ( (   
 K% % %   6 ' (( # % %
Section G.2
ISR2[5] RXRDY/FFULL D - Channel D Receiver
Ready or FIFO Full
  * '( *  (% ( (% %' &  ,( ,
!P.Q $*  (% ( *( (% ' *(,  * '( %  
/'( &1 ( ('  8!H!#  /1 (  (% (
*( ( ('%    %  ' ' *  (% (
;)   (% &    &  
+   (% ( (% %
3   ' ' (%  %* *    '( % (*
,(%  ;!   (% ' 3   
+ %  
;! $*    %(   ' '% ( ;! *  
 ( #   ( 3(  % ,( * ;! (%
/ 1
$*  (% ( (% ' *(,  * '( %   /$ 1
( ('   <<!#  (% (*( (% % 3   ' ' (%
 %* *      ;!      %*
'%% ;!  '  *  (% ( (% ' 3   

+ % ;!.    & / ( ,1   $#
6( ,   *    " ' ' $*  ' ' (%
3(( , (    '% ;! (% *#  (% ( 3(  %
,( *    ( # 3    ' ' (%
  (  ;!
Note: If this bit is configured to reflect the FFULLD
indicator, this bit will not be set (nor will produce an
interrupt request) if one or two characters are still
remaining in RHRD, following data reception. Hence, it is
possible that the last two characters in a string of data
(being received) could be lost due to this phenomenon.
ISR2[4] TXRDYD - Channel D Transmitter Ready
 (% ( (%  (' * 8!H !# !PQ
 (% (# 3  %# ( ('%   ;! (% &   (%
&  ''  ' ' *   
+    ( (%
' 3   
+ 3(%  3 ' '  ;!.
  (% % ,( # 3    ' ' (%  %*   
 8!H! (% % 3     %( (% ( ((&
    (% ' 3     %( (% (%

'%   (  ;! 3 (    %( (%
(% 3(    %(
ISR2[3] Counter # 2 Ready
$   $5  #
-D 
 -( D 3( %
$P4Q ' *  ' '&' *   %  %I 3
3 (' (% (    + (  $P4Q 3( 
' & (  6( ,   %%(,, / 
 
1 '   ) ( ( #   (   $5  #  
/+
 :51 '   3(  %   
-
$  
 :5  #  (% ( (% % 3    '  
' %   (  '      (% ' 3 
  '   (% %  &  /+
 :51
'   E   
 -( (% (  
 :5
 #   /+
 :51 '   3( %   

 -(  ( (%'%%(   ( *
 
 -( '  *   ( Section D
ISR2[2]: Delta Break C - Channel C Change in
Break
%%( *  (% ( ( ('%     '  
'(
% '   ,( ( , *      *  '(
6 )  (% ( (% ' 3   
+ (  6% 
'  
/% )6
 , $ 1 '  
    ( * ( (     K% % %  
)5= ' (( # % % Section G.2
ISR2[1] RXRDYA/FFULL C - Channel C Receiver
Ready or FIFO Full
  * '( *  (% ( (% %' &  ,( ,

P.Q $*  (% (*( (% ' *(,  * '( %  
/'( &1 ( ('  8!H
#  /1 (  (%
(*( ( ('%     (%  %  ' ' *
 ( ;
#   (% &    &  
+   (%
( (% % 3   ' ' (%  %* *     
;
  (% ' 3   
+ %   / %1
;
 $*    %(   ' '% ( ;
#
 
4