XRT94L33_07 Datasheet, PDF (858/862 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS

XRT94L33
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Table 762: Transmit STS-3c Path – RDI-P Control Register – Byte 2 (Address Location= 0x19C9)
BIT 7
R/O
0
BIT 6
BIT 5
Unused
R/O
R/O
0
0
BIT 4
R/O
0
BIT 3
BIT 2
BIT 1
PLM-P RDI-P Code[2:0]
R/W
R/W
R/W
0
0
0
BIT 0
Transmit RDI-P upon
PLM-P
R/W
0
BIT NUMBER
7–4
3-1
NAME
Unused
PLM-P RDI-P
Code[2:0]
0
Transmit RDI-P upon
PLM-P
TYPE
R/O
R/W
R/W
DESCRIPTION
PLM-P (Path – Payload Mismatch) – RDI-P Code:
These three READ/WRITE bit-fields permit the user to specify the
value that the Transmit STS-3c POH Processor block will transmit,
within the RDI-P bit-fields of the G1 byte (within the “outbound” STS-
3c SPE), whenever the corresponding Receive STS-3c POH
Processor block detects and declares a PLM-P condition.
Note: In order to enable this feature, the user must set Bit 0 (RDI-
P upon PLM-P) within this register to “1”.
Transmit RDI-P upon PLM-P:
This READ/WRITE bit-field permits the user to configure the Transmit
STS-3c POH Processor block to automatically transmit the RDI-P
Code (as configured in Bits 3 through 1 – within this register)
whenever the corresponding Receive STS-3c POH Processor block
declares a PLM-P condition.
0 – Disables the automatic transmission of RDI-P upon detection of
PLM-P.
1 – Enables the automatic transmission of RDI-P upon detection of
PLM-P.
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