XRT94L33_07 Datasheet, PDF (379/862 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS

Rev222...000...000
XRT94L33
333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR ––– AAATTTMMM RRREEEGGGIIISSSTTTEEERRRSSS
Table 305: Receive STS-1 Transport Interrupt Enable Register – Byte 2 (Address Location= 0xN10D)
BIT 7
R/O
0
BIT 6
R/O
0
BIT 5
BIT 4
Unused
R/O
R/O
0
0
BIT 3
R/O
0
BIT 2
R/O
0
BIT 1
Change of AIS-L
Condition
Interrupt Enable
R/W
0
BIT 0
Change of RDI-L
Condition
Interrupt Enable
R/W
0
BIT NUMBER
7–2
1
NAME
Unused
Change of AIS-L
Condition
Interrupt Enable
0
Change of RDI-L
Condition
Interrupt Enable
TYPE
R/O
R/W
R/W
DESCRIPTION
Change of AIS-L (Line AIS) Condition Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or disable
the “Change of AIS-L Condition” interrupt. If the user enables this
interrupt, then the XRT94L33 device will generate an interrupt in response
to either of the following conditions.
• When the Receive STS-1 TOH Processor block declares the “AIS-L”
condition.
• When the STS-1 Receiver clears the “AIS-L” condition.
0 – Disables the “Change of AIS-L Condition” Interrupt.
1 – Enables the “Change of AIS-L Condition” Interrupt.
Change of RDI-L (Line Remote Defect Indicator) Condition Interrupt
Enable:
This READ/WRITE bit-field permits the user to either enable or disable
the “Change of RDI-L Condition” interrupt. If the user enables this
interrupt, then the XRT94L33 device will generate an interrupt in response
to either of the following conditions.
• When the Receive STS-1 TOH Processor block declares the “RDI-L”
condition.
• When the Receive STS-1 TOH Processor clears the “RDI-L” condition.
0 – Disables the “Change of RDI-L Condition” Interrupt.
1 – Enables the “Change of RDI-L Condition” Interrupt.
379