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XRT94L33_07 Datasheet, PDF (137/862 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS | |||
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Rev222...000...000
XRT94L33
333---CCCHHHAAANNNNNNEEELLL DDDSSS333///EEE333///SSSTTTSSS---111 TTTOOO SSSTTTSSS---333///SSSTTTMMM---111 MMMAAAPPPPPPEEERRR âââ AAATTTMMM RRREEEGGGIIISSSTTTEEERRRSSS
1.4.3 TRANSMIT UTOPIA INTERFACE BLOCK REGISTER DESCIPTION
Table 70: Transmit UTOPIA/POS-PHY Control Register â Byte 0 (Address = 0x0583)
BIT 7
UTOPIA
Level 3
Disable
R/W
1
BIT 6
Multi-PHY
Polling
Enable
R/W
0
BIT 5
Back to
Back Polling
Enable
R/W
0
BIT 4
Direct
Status
Indication
Enable
R/W
0
BIT 3
BIT 2
UTOPIA/POS-PHY Data
Bus Width
R/W
R/W
1
1
BIT 1
BIT 0
Cell Size[1:0]
R/W
R/W
1
1
BIT NUMBER
7
6
5
NAME
UTOPIA Level 3 Disable
Multi-PHY Polling Enable
Back-to-Back Polling
Enable
TYPE
R/W
DESCRIPTION
R/W Multi-PHY Polling Enable:
This READ/WRITE bit-field permits the user to either enable or
disable Multi-PHY Polling for the Transmit UTOPIA Interface
block. If the user implements this feature (and configures the
XRT94L33 to operate in the Multi-PHY Mode) then the TxUClav
output pin will be driven (either âhighâ or âlowâ) based upon the
fill-status of the Transmit FIFO within the Channel that
corresponds to the âTransmit UTOPIA Addressâ that is currently
being applied to the âTxUAddr[4:0]â input pins.
If the user does not implement this feature (and then configures
the XRT94L33 to operate in the Single-PHY Mode), then the
âTxUClavâ output pin will unconditionally reflect the âTransmit
FIFO fill-statusâ for Channel 0. No attention will be paid to the
address values placed upon the âTxUAddr[4:0]â input pins.
0 â Configures the Transmit UTOPIA Interface block to operate
in the Single-PHY Mode.
1 â Configures the Transmit UTOPIA Interface block to operate
in the Multi-PHY Mode.
R/W Back-to-Back Polling Enable:
This READ/WRITE bit-field permits the user to configure the
Transmit UTOPIA Interface block to support âBack-to-Back
Pollingâ.
Ordinarily, for Multi-PHY polling, the user is required to interleave
all UTOPIA Address values (that are to be placed on the
âTxUAddr[4:0]â input pins) with the NULL Address (e.g., 0x1F).
However, if the user configures the Transmit UTOPIA Interface
block to operate in the âUTOPIA Level 3â Mode, and if the user
also enables âBack-to-Back Pollingâ, then he/she does not need
interleave the UTOPIA Addresses with the NULL Address. In
this case, the user can simply apply a âback-to-backâ stream of
ârelevantâ UTOPIA Addresses to the âTxUAddr[4:0]â input pins,
and the XRT94L33 will respond by driving the TxUClav output
pins to the appropriate states (depending upon the Transmit
FIFO fill-status).
0 â Disables âBack-to-Backâ Polling. In this mode, the user must
interleave all UTOPIA Addresses (that are to be applied to the
âTxUAddr[4:0]â input pins) with the NULL Address.
1 â Enables âBack-to-Backâ Polling. In this mode, the user does
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