XR21B1421 Datasheet, PDF (8/50 Pages) Exar Corporation – Enhanced 1-Ch Full-Speed

XR21B1421
28-pin QFN
Pin No.
Pin Name
16
GPIO8/DTR#
17
GPIO7/RI#/RWK#
18
NC
19
GPIO6/CD#
20
NC
21
NC
22
NC
23
GPIO2/CTS#
24
GPIO1/RTS#/RS485
25
RX
26
TX
27
GPIO5/RXT
28
GPIO4/TXT
Center
Pad
GND
Type
I/O
I/O
I/O
I/O
I/O
I
O
I/O
I/O
PWR
Description
General purpose I/O, or UART Data-Terminal-Ready push-pull output (active low). Defaults to
GPIO push-pull output. See “Automatic DTR/DSR Hardware Flow Control” on page 16.
General purpose I/O, or UART Ring-Indicator input (active low) or Remote Wakeup input (active
low). Defaults to GPIO input with internal pull-up.
No Connect
General purpose I/O, or UART Carrier-Detect input (active low). Defaults to GPIO input with inter-
nal pull-up.
No Connect
No Connect
No Connect
General purpose I/O, or UART Clear-to-Send input (active low). Defaults to CTS input with inter-
nal pull-up. See “Automatic RTS/CTS Hardware Flow Control” on page 15.
General purpose I/O, or UART Request-to-Send output (active low) or auto. RS-485 half-duplex
enable. Defaults to open drain RTS output. See “GET / SET_GPIO_CONFIG” on page 28 and
“GET / SET_PIN_CONFIG” on page 41.
UART Receive Data.
UART Transmit Data.
General purpose I/O, or UART receive indicator. Defaults to receive indicator push-pull output.
When configured as receive indicator, this pin will toggle at ~10 Hz intervals while the UART is
receiving data.
General purpose I/O, or UART transmit indicator. Defaults to transmit indicator push-pull output.
When configured as transmit indicator, this pin will toggle at ~10 Hz intervals during UART data
transmission.
The center pad on the back side of the QFN package is metallic and should be connected to
GND on the PCB. The thermal pad size on the PCB should be the approximate size of this center
pad and should be solder mask defined. The solder mask opening should be at least 0.0025"
inwards from the edge of the PCB thermal pad.
1. Pin type: I=Input, O=Push-pull Output, I/O= Input/output, PWR=Power, OD=Open Drain Output with weak internal pull-up
2. All GPIO pins as well as USB_STAT1 and USB_STAT2 may be configured for a variety of pin type options using the GPIO_MODE register or by writing
to the OTP using XR_SET_OTP.
3. All enabled pull-up and pull-down resistors are maintained during USB suspend state.
4. Pin configurations set using XR_SET_OTP are enabled following the next power up reset and are permanent. During USB bus reset, resistors are dis-
abled and re-enabled after bus reset is deasserted. Pin configurations set using the GPIO_MODE register will be lost after POR or USB bus reset.
© 2014 Exar Corporation
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exar.com/XR21B1421
Rev 1B